[llvm] r259306 - [WebAssembly] Fix uses of FrameIndex as store values

Derek Schuff via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 30 13:43:11 PST 2016


Author: dschuff
Date: Sat Jan 30 15:43:08 2016
New Revision: 259306

URL: http://llvm.org/viewvc/llvm-project?rev=259306&view=rev
Log:
[WebAssembly] Fix uses of FrameIndex as store values

Previously the code assumed all uses of FI on loads and stores were as
addresses. This checks whether the use is the address or a value and
handles the latter case as it does for non-memory instructions.

Modified:
    llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
    llvm/trunk/test/CodeGen/WebAssembly/userstack.ll

Modified: llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h?rev=259306&r1=259305&r2=259306&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h (original)
+++ llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h Sat Jan 30 15:43:08 2016
@@ -125,6 +125,8 @@ inline unsigned GetDefaultP2Align(unsign
   }
 }
 
+/// The operand number of the load or store address in load/store instructions.
+static const unsigned MemOpAddressOperandNo = 2;
 /// The operand number of the stored value in a store instruction.
 static const unsigned StoreValueOperandNo = 4;
 

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp?rev=259306&r1=259305&r2=259306&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp Sat Jan 30 15:43:08 2016
@@ -63,9 +63,9 @@ void WebAssemblyRegisterInfo::eliminateF
   const MachineFrameInfo &MFI = *MF.getFrameInfo();
   int64_t FrameOffset = MFI.getStackSize() + MFI.getObjectOffset(FrameIndex);
 
-  if (MI.mayLoadOrStore()) {
-    // If this is a load or store, make it relative to SP and fold the frame
-    // offset directly in.
+  if (MI.mayLoadOrStore() && FIOperandNum == WebAssembly::MemOpAddressOperandNo) {
+    // If this is the address operand of a load or store, make it relative to SP
+    // and fold the frame offset directly in.
     assert(FrameOffset >= 0 && MI.getOperand(1).getImm() >= 0);
     int64_t Offset = MI.getOperand(1).getImm() + FrameOffset;
 

Modified: llvm/trunk/test/CodeGen/WebAssembly/userstack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/userstack.ll?rev=259306&r1=259305&r2=259306&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/userstack.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/userstack.ll Sat Jan 30 15:43:08 2016
@@ -78,9 +78,10 @@ define void @allocarray() {
 
 declare void @ext_func(i64* %ptr)
 ; CHECK-LABEL: non_mem_use
-define void @non_mem_use() {
- ; CHECK: i32.const [[L2:.+]]=, 16
+define void @non_mem_use(i8** %addr) {
+ ; CHECK: i32.const [[L2:.+]]=, 48
  ; CHECK-NEXT: i32.sub [[SP:.+]]=, {{.+}}, [[L2]]
+ %buf = alloca [27 x i8], align 16
  %r = alloca i64
  %r2 = alloca i64
  ; %r is at SP+8
@@ -91,6 +92,13 @@ define void @non_mem_use() {
  ; %r2 is at SP+0, no add needed
  ; CHECK-NEXT: call ext_func at FUNCTION, [[SP]]
  call void @ext_func(i64* %r2)
+ ; Use as a value, but in a store
+ ; %buf is at SP+16
+ ; CHECK: i32.const [[OFF:.+]]=, 16
+ ; CHECK-NEXT: i32.add [[VAL:.+]]=, [[SP]], [[OFF]]
+ ; CHECK-NEXT: i32.store {{.*}}=, 0($0), [[VAL]]
+ %gep = getelementptr inbounds [27 x i8], [27 x i8]* %buf, i32 0, i32 0
+ store i8* %gep, i8** %addr
  ret void
 }
 
@@ -151,4 +159,5 @@ define void @dynamic_static_alloca(i32 %
  ; CHECK-NEXT: i32.store [[SP]]=, 0([[L4]]), [[SP]]
  ret void
 }
-; TODO: test aligned alloc
+
+; TODO: test over-aligned alloca




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