[llvm] r259305 - WebAssembly: don't optimize frameindex store

[JF Bastien via llvm-commits]

Author: jfb
Date: Sat Jan 30 08:11:26 2016
New Revision: 259305

URL: http://llvm.org/viewvc/llvm-project?rev=259305&view=rev
Log:
WebAssembly: don't optimize frameindex store

The previous code was incorrect (can't getReg a frameindex). We could instead optimize it to reduce tree height, but I'm not sure that's worthwhile yet because we then try to eliminate the frameindex.

This patch also fixes frame index elimination for operations which may load or store: it used to assume the base was operand 2 and immediate offset operand 1. That's not true for stores, where they're 4 and 3.

Modified:
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
    llvm/trunk/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp
    llvm/trunk/test/CodeGen/WebAssembly/store-results.ll

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp?rev=259305&r1=259304&r2=259305&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp Sat Jan 30 08:11:26 2016
@@ -74,8 +74,9 @@ void WebAssemblyRegisterInfo::eliminateF
       // generate broken code.
       report_fatal_error("Memory offset field overflow");
     }
-    MI.getOperand(1).setImm(Offset);
-    MI.getOperand(2).ChangeToRegister(WebAssembly::SP32, /*IsDef=*/false);
+    MI.getOperand(FIOperandNum - 1).setImm(Offset);
+    MI.getOperand(FIOperandNum)
+        .ChangeToRegister(WebAssembly::SP32, /*IsDef=*/false);
   } else {
     // Otherwise create an i32.add SP, offset and make it the operand.
     auto &MRI = MF.getRegInfo();

Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp?rev=259305&r1=259304&r2=259305&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp Sat Jan 30 08:11:26 2016
@@ -134,10 +134,17 @@ bool WebAssemblyStoreResults::runOnMachi
       case WebAssembly::STORE_F64:
       case WebAssembly::STORE_I32:
       case WebAssembly::STORE_I64: {
-        unsigned ToReg = MI.getOperand(0).getReg();
-        unsigned FromReg =
-            MI.getOperand(WebAssembly::StoreValueOperandNo).getReg();
-        Changed |= ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT);
+        const auto &Stored = MI.getOperand(WebAssembly::StoreValueOperandNo);
+        if (Stored.isReg()) {
+          unsigned ToReg = MI.getOperand(0).getReg();
+          unsigned FromReg = Stored.getReg();
+          Changed |= ReplaceDominatedUses(MBB, MI, FromReg, ToReg, MRI, MDT);
+        } else if (Stored.isFI()) {
+          break;
+        } else {
+          report_fatal_error(
+              "Store results: store not consuming reg or frame index");
+        }
         break;
       }
       case WebAssembly::CALL_I32:

Modified: llvm/trunk/test/CodeGen/WebAssembly/store-results.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/store-results.ll?rev=259305&r1=259304&r2=259305&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/store-results.ll (original)
+++ llvm/trunk/test/CodeGen/WebAssembly/store-results.ll Sat Jan 30 08:11:26 2016
@@ -59,3 +59,13 @@ for.body5.i:
 for.cond.cleanup4.i:
   ret void
 }
+
+; CHECK-LABEL: fi_ret:
+; CHECK: i32.store $discard=,
+define hidden i8* @fi_ret(i8** %addr) {
+entry:
+  %buf = alloca [27 x i8], align 16
+  %0 = getelementptr inbounds [27 x i8], [27 x i8]* %buf, i32 0, i32 0
+  store i8* %0, i8** %addr
+  ret i8* %0
+}