[llvm] r259178 - Refactor common code for PPC fast isel load immediate selection.
Eric Christopher via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 28 23:20:30 PST 2016
Author: echristo
Date: Fri Jan 29 01:20:30 2016
New Revision: 259178
URL: http://llvm.org/viewvc/llvm-project?rev=259178&view=rev
Log:
Refactor common code for PPC fast isel load immediate selection.
Modified:
llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
Modified: llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp?rev=259178&r1=259177&r2=259178&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp Fri Jan 29 01:20:30 2016
@@ -2092,20 +2092,16 @@ unsigned PPCFastISel::PPCMaterializeInt(
((VT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass);
// If the constant is in range, use a load-immediate.
- if (UseSExt && isInt<16>(CI->getSExtValue())) {
+ // Since LI will sign extend the constant we need to make sure that for
+ // our zeroext constants that the sign extended constant fits into 16-bits -
+ // a range of 0..0x7fff.
+ if ((UseSExt && isInt<16>(CI->getSExtValue())) ||
+ (!UseSExt && isUInt<16>(CI->getSExtValue()))) {
unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI;
unsigned ImmReg = createResultReg(RC);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ImmReg)
.addImm(CI->getSExtValue());
return ImmReg;
- } else if (!UseSExt && isUInt<16>(CI->getSExtValue())) {
- // Since LI will sign extend the constant we need to make sure that for
- // our zeroext constants that the sign extended constant fits into 16-bits.
- unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI;
- unsigned ImmReg = createResultReg(RC);
- BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ImmReg)
- .addImm(CI->getZExtValue());
- return ImmReg;
}
// Construct the constant piecewise.
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