[PATCH] D16369: [AArch64] Don't drop MMOs in the load/store optimizer when forming ldp/stp instructions or pre-/post-index loads/stores.

[Chad Rosier via llvm-commits]

mcrosier created this revision.
mcrosier added reviewers: reames, MatzeB, jmolloy.
mcrosier added subscribers: llvm-commits, gberry.
Herald added subscribers: rengolin, aemerson.

Without this change I believe the post-ra mi scheduler treats these transformed loads/stores as scheduling barriers.  Therefore, I don't think we want to just drop the MMOs.

 Chad

http://reviews.llvm.org/D16369

Files:
  lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

Index: lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
===================================================================
--- lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -780,7 +780,8 @@
               .addOperand(getLdStRegOp(RtMI))
               .addOperand(getLdStRegOp(Rt2MI))
               .addOperand(BaseRegOp)
-              .addImm(OffsetImm);
+              .addImm(OffsetImm)
+              .setMemRefs(I->mergeMemRefsWith(*Paired));
   }
 
   (void)MIB;
@@ -1265,6 +1266,7 @@
               .addOperand(getLdStRegOp(I))
               .addOperand(getLdStBaseOp(I))
               .addImm(Value);
+    MIB->setMemRefs(I->memoperands_begin(), I->memoperands_end());
   } else {
     // Paired instruction.
     int Scale = getMemScale(I);
@@ -1274,6 +1276,7 @@
               .addOperand(getLdStRegOp(I, 1))
               .addOperand(getLdStBaseOp(I))
               .addImm(Value / Scale);
+    MIB->setMemRefs(I->memoperands_begin(), I->memoperands_end());
   }
   (void)MIB;
 


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