[PATCH] D15622: AMDGPU: fix overlapping copies in copyPhysReg

[Nicolai Hähnle via llvm-commits]

nhaehnle created this revision.
nhaehnle added reviewers: tstellarAMD, arsenm.
nhaehnle added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.

When copying aggregate registers within the same register class, there may
be an overlap between source and destination that forces us to do the copy
backwards.

Do the simplest possible thing (relying on the order of enums generated by
tablegen) that guarantees the correct order of moves when there are overlaps,
and does whatever when there is no overlap. (The last part forces some
trivial adjustments to test cases.)

Together with r255906, this fixes a VM fault in Unreal Elemental Demo.

While at it, change the generation of kill and def flags to something that
looks more reasonable. This method is used very late during compilation, so
it probably doesn't matter in practice, and to be honest, I don't know if
this change is actually correct because the semantics in connection with
aggregate registers vs. sub-registers are not clear to me.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93264

http://reviews.llvm.org/D15622

Files:
  lib/Target/AMDGPU/SIInstrInfo.cpp
  test/CodeGen/AMDGPU/ctpop64.ll
  test/CodeGen/AMDGPU/flat-address-space.ll
  test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll

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