[PATCH] D15474: AMDGPU/SI: Add llvm.amdgcn.v.interp.p[12] intrinsics

[Matt Arsenault via llvm-commits]

arsenm added inline comments.

================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:135
@@ +134,3 @@
+// __builtin_amdgcn_v_interp_p1 <i>, <attr_chan>, <attr>, <m0>
+def int_amdgcn_v_interp_p1 :
+  GCCBuiltin<"__builtin_amdgcn_v_interp_p1">,
----------------
I'm not sure this should have the v prefix

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Comment at: lib/Target/AMDGPU/AMDGPUIntrinsicExpander.cpp:1
@@ +1,2 @@
+//===-- AMDGPUIntrinsicExpanderPass.cpp ---------------------------------------===//
+//
----------------
Why is this easier than handling the differences during intrinsic lowering?

================
Comment at: test/CodeGen/AMDGPU/llvm.SI.fs.interp.ll:74-78
@@ -54,1 +73,7 @@
 
+; Function Attrs: nounwind readnone
+declare float @llvm.amdgcn.v.interp.p1(i32, i32, i32, i32) #1
+
+; Function Attrs: nounwind readnone
+declare float @llvm.amdgcn.v.interp.p2(float, i32, i32, i32, i32) #1
+
----------------
Should be moved into file with new name


http://reviews.llvm.org/D15474