[PATCH] D15477: [X86][AVX] Only shuffle the lower half of vectors if the upper half is undefined

[Cong Hou via llvm-commits]

congh added inline comments.

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:22530
@@ -22527,3 +22529,3 @@
       if (!isUndefOrEqual(SVOp->getMaskElt(i), i) ||
-          !isUndefOrEqual(SVOp->getMaskElt(i+NumElems/2), NumElems))
+          !isUndefOrEqual(SVOp->getMaskElt(i+ HalfNumElems), NumElems))
         return SDValue();
----------------
Nit: left space on +?

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:22598
@@ +22597,3 @@
+      }
+      AllLowerHalf &= (M % NumElems) < HalfNumElems;
+      if (M >= (int)NumElems) {
----------------
Early exit if AllLowerHalf is false?

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:22611
@@ +22610,3 @@
+      SDValue V = DAG.getVectorShuffle(HalfVT, dl, Half1, Half2, HalfMask);
+      SDValue InsV = Insert128BitVector(DAG.getUNDEF(VT), V, 0, DAG, dl);
+      return DCI.CombineTo(N, InsV);
----------------
Can we always guarantee that V is a 128-bit vector?  I remember VECTOR_SHUFFLE can have different types for its operands and result.


Repository:
  rL LLVM

http://reviews.llvm.org/D15477