[PATCH] D15110: Fixed a bug in FP logic operation lowering on AVX-512

[Elena Demikhovsky via llvm-commits]

delena created this revision.
delena added a reviewer: craig.topper.
delena added a subscriber: llvm-commits.
delena set the repository for this revision to rL LLVM.

FP logic instructions are supported in DQ extension on AVX-512  target.
We can use integer operations instead.
Added tests.
I also enabled FABS in this patch in order to check ANDPS.

Repository:
  rL LLVM

http://reviews.llvm.org/D15110

Files:
  ../lib/Target/X86/X86ISelLowering.cpp
  ../lib/Target/X86/X86InstrInfo.td
  ../lib/Target/X86/X86InstrSSE.td
  ../test/CodeGen/X86/avx-logic.ll
  ../test/CodeGen/X86/avx512-arith.ll
  ../test/CodeGen/X86/vec_fabs.ll

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