[PATCH] D14534: [AArch64] Fix halfword load merging for big-endian targets

[Oliver Stannard via llvm-commits]

olista01 added inline comments.

================
Comment at: lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp:568
@@ -562,3 +567,3 @@
     MachineInstr *ExtDestMI = MergeForward ? Paired : I;
-    if (ExtDestMI == Rt2MI) {
+    if ((ExtDestMI == Rt2MI) == Subtarget->isLittleEndian()) {
       // Create the bitfield extract for high half.
----------------
rengolin wrote:
> I'm guessing the code makes it Rt2MI and RtMI the *only* two possible options?
Yep, ExtDestMI and Rt2MI are both set to either I or Paired earlier in this function.


Repository:
  rL LLVM

http://reviews.llvm.org/D14534