[PATCH] D13771: [AArch64]Add support for converting halfword loads into a 32-bit word load
Jun Bum Lim via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 19 07:32:21 PDT 2015
junbuml added inline comments.
================
Comment at: lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp:1142
@@ +1141,3 @@
+ if (Paired != E) {
+ ++NumPairCreated;
+ if (isUnscaledLdSt(MI))
----------------
mcrosier wrote:
> If we merge two ldrh instructions into a ldr we haven't actually created a paired instruction. How about we add another statistic to count when we merge narrow loads/stores into wider loads/stores?
Adding new statistic sounds good to me.
http://reviews.llvm.org/D13771
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