[PATCH] D13644: AVX-512 bit shuffle in 32-bit mode - fixed a bug

[Simon Pilgrim via llvm-commits]

RKSimon added inline comments.

================
Comment at: ../lib/Target/X86/X86ISelLowering.cpp:10756
@@ -10729,2 +10755,3 @@
+
   if (isSingleInputShuffleMask(Mask))
     return DAG.getNode(X86ISD::VPERMV, DL, VT, MaskNode, V1);
----------------
I meant use the helper to take VPermMask, split from i64 elements into 2xi32 if 32-bit, and create the BUILD_VECTOR - such a helper would then be useful for other situations where we need to legalize i64 build vectors on 32-bit targets. No need for getConstMaskVector to be shuffle mask specific.


Repository:
  rL LLVM

http://reviews.llvm.org/D13644