[llvm] r249665 - [SystemZ] Bugfix: check CC reg liveness in SystemZShortenInst.

[David Blaikie via llvm-commits]

And this (tests?)?
On Oct 8, 2015 12:42 AM, "Jonas Paulsson via llvm-commits" <
llvm-commits at lists.llvm.org> wrote:

> Author: jonpa
> Date: Thu Oct  8 02:40:19 2015
> New Revision: 249665
>
> URL: http://llvm.org/viewvc/llvm-project?rev=249665&view=rev
> Log:
> [SystemZ] Bugfix: check CC reg liveness in SystemZShortenInst.
>
> The following instruction shortening transformations would introduce a
> definition of the CC reg, so therefore liveness of CC reg must be checked:
>
> WFADB -> ADBR
> WFSDB -> SDBR
>
> Also add the CC reg implicit def operand to the MI in case of change of
> opcode.
>
> Reviewed by Ulrich Weigand.
>
> Modified:
>     llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp
>
> Modified: llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp?rev=249665&r1=249664&r2=249665&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp (original)
> +++ llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp Thu Oct  8
> 02:40:19 2015
> @@ -40,6 +40,7 @@ private:
>    bool shortenOn0(MachineInstr &MI, unsigned Opcode);
>    bool shortenOn01(MachineInstr &MI, unsigned Opcode);
>    bool shortenOn001(MachineInstr &MI, unsigned Opcode);
> +  bool shortenOn001AddCC(MachineInstr &MI, unsigned Opcode, bool CCLive);
>    bool shortenFPConv(MachineInstr &MI, unsigned Opcode);
>
>    const SystemZInstrInfo *TII;
> @@ -134,6 +135,18 @@ bool SystemZShortenInst::shortenOn001(Ma
>    return false;
>  }
>
> +// Calls shortenOn001 if CCLive is false. CC def operand is added in
> +// case of success.
> +bool SystemZShortenInst::shortenOn001AddCC(MachineInstr &MI, unsigned
> Opcode,
> +                                          bool CCLive) {
> +  if (!CCLive && shortenOn001(MI, Opcode)) {
> +    MachineInstrBuilder(*MI.getParent()->getParent(), &MI)
> +      .addReg(SystemZ::CC, RegState::ImplicitDefine);
> +    return true;
> +  }
> +  return false;
> +}
> +
>  // MI is a vector-style conversion instruction with the operand order:
>  // destination, source, exact-suppress, rounding-mode.  If both registers
>  // have a 4-bit encoding then change it to Opcode, which has operand
> order:
> @@ -167,12 +180,15 @@ bool SystemZShortenInst::processBlock(Ma
>    // Work out which words are live on exit from the block.
>    unsigned LiveLow = 0;
>    unsigned LiveHigh = 0;
> +  bool CCLive = false;
>    for (auto SI = MBB.succ_begin(), SE = MBB.succ_end(); SI != SE; ++SI) {
>      for (const auto &LI : (*SI)->liveins()) {
>        unsigned Reg = LI.PhysReg;
>        assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number");
>        LiveLow |= LowGPRs[Reg];
>        LiveHigh |= HighGPRs[Reg];
> +      if (Reg == SystemZ::CC)
> +       CCLive = true;
>      }
>    }
>
> @@ -191,7 +207,7 @@ bool SystemZShortenInst::processBlock(Ma
>        break;
>
>      case SystemZ::WFADB:
> -      Changed |= shortenOn001(MI, SystemZ::ADBR);
> +      Changed |= shortenOn001AddCC(MI, SystemZ::ADBR, CCLive);
>        break;
>
>      case SystemZ::WFDDB:
> @@ -230,10 +246,10 @@ bool SystemZShortenInst::processBlock(Ma
>        Changed |= shortenOn01(MI, SystemZ::SQDBR);
>        break;
>
> -    case SystemZ::WFSDB:
> -      Changed |= shortenOn001(MI, SystemZ::SDBR);
> +    case SystemZ::WFSDB: {
> +      Changed |= shortenOn001AddCC(MI, SystemZ::SDBR, CCLive);
>        break;
> -
> +    }
>      case SystemZ::WFCDB:
>        Changed |= shortenOn01(MI, SystemZ::CDBR);
>        break;
> @@ -276,6 +292,11 @@ bool SystemZShortenInst::processBlock(Ma
>      }
>      LiveLow |= UsedLow;
>      LiveHigh |= UsedHigh;
> +
> +    if (MI.definesRegister(SystemZ::CC))
> +      CCLive = false;
> +    if (MI.readsRegister(SystemZ::CC))
> +      CCLive = true;
>    }
>
>    return Changed;
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20151008/777fc775/attachment.html>