<p dir="ltr">And this (tests?)?</p>
<div class="gmail_quote">On Oct 8, 2015 12:42 AM, "Jonas Paulsson via llvm-commits" <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br type="attribution"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: jonpa<br>
Date: Thu Oct  8 02:40:19 2015<br>
New Revision: 249665<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=249665&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=249665&view=rev</a><br>
Log:<br>
[SystemZ] Bugfix: check CC reg liveness in SystemZShortenInst.<br>
<br>
The following instruction shortening transformations would introduce a<br>
definition of the CC reg, so therefore liveness of CC reg must be checked:<br>
<br>
WFADB -> ADBR<br>
WFSDB -> SDBR<br>
<br>
Also add the CC reg implicit def operand to the MI in case of change of opcode.<br>
<br>
Reviewed by Ulrich Weigand.<br>
<br>
Modified:<br>
    llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp?rev=249665&r1=249664&r2=249665&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp?rev=249665&r1=249664&r2=249665&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp Thu Oct  8 02:40:19 2015<br>
@@ -40,6 +40,7 @@ private:<br>
   bool shortenOn0(MachineInstr &MI, unsigned Opcode);<br>
   bool shortenOn01(MachineInstr &MI, unsigned Opcode);<br>
   bool shortenOn001(MachineInstr &MI, unsigned Opcode);<br>
+  bool shortenOn001AddCC(MachineInstr &MI, unsigned Opcode, bool CCLive);<br>
   bool shortenFPConv(MachineInstr &MI, unsigned Opcode);<br>
<br>
   const SystemZInstrInfo *TII;<br>
@@ -134,6 +135,18 @@ bool SystemZShortenInst::shortenOn001(Ma<br>
   return false;<br>
 }<br>
<br>
+// Calls shortenOn001 if CCLive is false. CC def operand is added in<br>
+// case of success.<br>
+bool SystemZShortenInst::shortenOn001AddCC(MachineInstr &MI, unsigned Opcode,<br>
+                                          bool CCLive) {<br>
+  if (!CCLive && shortenOn001(MI, Opcode)) {<br>
+    MachineInstrBuilder(*MI.getParent()->getParent(), &MI)<br>
+      .addReg(SystemZ::CC, RegState::ImplicitDefine);<br>
+    return true;<br>
+  }<br>
+  return false;<br>
+}<br>
+<br>
 // MI is a vector-style conversion instruction with the operand order:<br>
 // destination, source, exact-suppress, rounding-mode.  If both registers<br>
 // have a 4-bit encoding then change it to Opcode, which has operand order:<br>
@@ -167,12 +180,15 @@ bool SystemZShortenInst::processBlock(Ma<br>
   // Work out which words are live on exit from the block.<br>
   unsigned LiveLow = 0;<br>
   unsigned LiveHigh = 0;<br>
+  bool CCLive = false;<br>
   for (auto SI = MBB.succ_begin(), SE = MBB.succ_end(); SI != SE; ++SI) {<br>
     for (const auto &LI : (*SI)->liveins()) {<br>
       unsigned Reg = LI.PhysReg;<br>
       assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number");<br>
       LiveLow |= LowGPRs[Reg];<br>
       LiveHigh |= HighGPRs[Reg];<br>
+      if (Reg == SystemZ::CC)<br>
+       CCLive = true;<br>
     }<br>
   }<br>
<br>
@@ -191,7 +207,7 @@ bool SystemZShortenInst::processBlock(Ma<br>
       break;<br>
<br>
     case SystemZ::WFADB:<br>
-      Changed |= shortenOn001(MI, SystemZ::ADBR);<br>
+      Changed |= shortenOn001AddCC(MI, SystemZ::ADBR, CCLive);<br>
       break;<br>
<br>
     case SystemZ::WFDDB:<br>
@@ -230,10 +246,10 @@ bool SystemZShortenInst::processBlock(Ma<br>
       Changed |= shortenOn01(MI, SystemZ::SQDBR);<br>
       break;<br>
<br>
-    case SystemZ::WFSDB:<br>
-      Changed |= shortenOn001(MI, SystemZ::SDBR);<br>
+    case SystemZ::WFSDB: {<br>
+      Changed |= shortenOn001AddCC(MI, SystemZ::SDBR, CCLive);<br>
       break;<br>
-<br>
+    }<br>
     case SystemZ::WFCDB:<br>
       Changed |= shortenOn01(MI, SystemZ::CDBR);<br>
       break;<br>
@@ -276,6 +292,11 @@ bool SystemZShortenInst::processBlock(Ma<br>
     }<br>
     LiveLow |= UsedLow;<br>
     LiveHigh |= UsedHigh;<br>
+<br>
+    if (MI.definesRegister(SystemZ::CC))<br>
+      CCLive = false;<br>
+    if (MI.readsRegister(SystemZ::CC))<br>
+      CCLive = true;<br>
   }<br>
<br>
   return Changed;<br>
<br>
<br>
_______________________________________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a><br>
<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
</blockquote></div>