[PATCH] D13447: [AArch64]Fix bug in DAG combine for ADDV

[James Molloy via llvm-commits]

jmolloy requested changes to this revision.
jmolloy added a comment.
This revision now requires changes to proceed.

Hi Jun,

I don't think this is the right fix. We generate oversized vectors in the loop vectorizer, and we expect them to work well. The right way to solve this PR is by implementing vector splitting for the [US]ADDV and [SU][MIN,MAX]V nodes.

Cheers,

James


http://reviews.llvm.org/D13447