[PATCH] D13447: [AArch64]Fix bug in DAG combine for ADDV
Jun Bum Lim via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 5 13:23:23 PDT 2015
junbuml created this revision.
junbuml added reviewers: jmolloy, mcrosier, chatur01.
junbuml added a subscriber: llvm-commits.
Herald added subscribers: rengolin, aemerson.
Added more constraint when checking the number of vector elements during DAG combine for across vector reductions.
This fix PR25056.
http://reviews.llvm.org/D13447
Files:
lib/Target/AArch64/AArch64ISelLowering.cpp
test/CodeGen/AArch64/aarch64-addv.ll
test/CodeGen/AArch64/aarch64-minmaxv.ll
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