[PATCH] D13442: [AArch64] Fold vector fmul by pow2 into floating-point to fixed-point conversion.
Chad Rosier via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 5 11:22:28 PDT 2015
mcrosier created this revision.
mcrosier added reviewers: t.p.northover, jmolloy, Gerolf.
mcrosier added subscribers: llvm-commits, mssimpso, haicheng, junbuml, gberry, bmakam.
mcrosier set the repository for this revision to rL LLVM.
Herald added subscribers: rengolin, aemerson.
FCVT (floating-point to signed/unsigned fixed-point conversion) can replace
combinations of FMUL and FCVT (floating-point to integer) when the FMUL has a
constant operand that is a power of 2.
For example, assuming v1 contains 16.000000e+00:
fmul.2s v0, v1, v0[0]
fcvtzs.2s v0, v0
becomes
fcvtzs.2s v0, v0, #4
Please take a look.
Thanks,
Chad
Repository:
rL LLVM
http://reviews.llvm.org/D13442
Files:
lib/Target/AArch64/AArch64ISelLowering.cpp
test/CodeGen/AArch64/fcvt_combine.ll
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