[PATCH] D12032: Vector element extraction without stack operations on Power 8

Bill Schmidt via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 21 13:14:39 PDT 2015


wschmidt added a comment.

Otherwise, this LGTM.  Thanks for addressing all my concerns!


================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:558
@@ -554,1 +557,3 @@
         //setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i64, Legal);
+        setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v16i8, Legal);
+        setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v8i16, Legal);
----------------
You don't want to reintroduce this restriction, right?

================
Comment at: test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll:64
@@ -63,3 +63,3 @@
 ; FIXME-CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3
 ; FIXME-CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]]
 }
----------------
Same here -- don't disable these checks.

================
Comment at: test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll:96
@@ +95,3 @@
+; CHECK-LE: clrldi 3, 3, 56
+; CHECK-LE: extsb 3, 3
+}
----------------
Do we have an issue open for the unnecessary extsb?  We should peephole this away at some point.  Please open one if there is not.

================
Comment at: test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll:735
@@ +734,3 @@
+; CHECK-LE: clrldi 3, 3, 48
+; CHECK-LE: extsh 3, 3
+}
----------------
Similarly, the extsh should be peepholed away eventually.


Repository:
  rL LLVM

http://reviews.llvm.org/D12032





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