[PATCH] D12887: [Machine Combiner] Refactor machine reassociation into a target-independent pass

[Sanjay Patel via llvm-commits]

spatel added inline comments.

================
Comment at: include/llvm/CodeGen/MachineCombinerPattern.h:36-48
@@ +35,15 @@
+  /// Enumeration of instruction pattern supported by machine combiner
+  MC_NONE = 4,
+  MC_MULADDW_OP1 = 5,
+  MC_MULADDW_OP2 = 6,
+  MC_MULSUBW_OP1 = 7,
+  MC_MULSUBW_OP2 = 8,
+  MC_MULADDWI_OP1 = 9,
+  MC_MULSUBWI_OP1 = 10,
+  MC_MULADDX_OP1 = 11,
+  MC_MULADDX_OP2 = 12,
+  MC_MULSUBX_OP1 = 13,
+  MC_MULSUBX_OP2 = 14,
+  MC_MULADDXI_OP1 = 15,
+  MC_MULSUBXI_OP1 = 16
+};
----------------
Forgot to mention: the AArch patterns should not specify an enum value directly. The reassociation patterns must specify a value from 0-3 because we use those values as indexes into an array (that's rather hacky, but changing it would be another follow-on commit).


Repository:
  rL LLVM

http://reviews.llvm.org/D12887