[PATCH] D11632: [mips][microMIPS] Implement CACHEE and PREFE instructions for microMIPS32r6
Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 15 03:06:42 PDT 2015
This revision was automatically updated to reflect the committed changes.
Closed by commit rL247670: [mips][microMIPS] Implement CACHEE and PREFE instructions for microMIPS32r6 (authored by zjovanovic).
Changed prior to commit:
http://reviews.llvm.org/D11632?vs=31001&id=34791#toc
Repository:
rL LLVM
http://reviews.llvm.org/D11632
Files:
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
llvm/trunk/lib/Target/Mips/MicroMips32r6InstrFormats.td
llvm/trunk/lib/Target/Mips/MicroMips32r6InstrInfo.td
llvm/trunk/test/MC/Disassembler/Mips/micromips32r6.txt
llvm/trunk/test/MC/Mips/micromips32r6/valid.s
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D11632.34791.patch
Type: text/x-patch
Size: 4676 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150915/42927ba3/attachment.bin>
More information about the llvm-commits
mailing list