[PATCH] D12692: LLVM does not distinguish Cortex-M4 from Cortex-M4F neither Cortex-R5 from R5F

[Alexandros Lamprineas via llvm-commits]

labrinea created this revision.
labrinea added a reviewer: rengolin.
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Herald added a subscriber: aemerson.

LLVM currently treats Cortex-M4 and Cortex-R5 as having an FPU. However it distinguishes other arm processors that come optionally with an FPU. These are: cortex-r4, arm1136j-s, arm1176jz-s, mpcore, and arm1156t2-s. Apparently Target Parser and ARM.td are not synchronized.

http://reviews.llvm.org/D12692

Files:
  lib/Target/ARM/ARM.td
  test/CodeGen/ARM/aapcs-hfa-code.ll
  test/CodeGen/ARM/build-attributes.ll
  test/CodeGen/ARM/darwin-eabi.ll
  test/CodeGen/ARM/special-reg.ll
  test/CodeGen/Thumb2/cortex-fp.ll
  test/CodeGen/Thumb2/float-cmp.ll
  test/CodeGen/Thumb2/float-intrinsics-double.ll
  test/CodeGen/Thumb2/float-intrinsics-float.ll
  test/CodeGen/Thumb2/float-ops.ll
  test/MC/ARM/vfp4.s

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