[llvm] r246074 - FastISel: Avoid adding a successor block twice for degenerate IR.

[Matthias Braun via llvm-commits]

Author: matze
Date: Wed Aug 26 15:46:49 2015
New Revision: 246074

URL: http://llvm.org/viewvc/llvm-project?rev=246074&view=rev
Log:
FastISel: Avoid adding a successor block twice for degenerate IR.

This fixes http://llvm.org/PR24581

Differential Revision: http://reviews.llvm.org/D12350

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
    llvm/trunk/test/CodeGen/X86/fast-isel-cmp-branch.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=246074&r1=246073&r2=246074&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Wed Aug 26 15:46:49 2015
@@ -1415,7 +1415,11 @@ void FastISel::finishCondBranch(const Ba
   if (FuncInfo.BPI)
     BranchWeight = FuncInfo.BPI->getEdgeWeight(BranchBB,
                                                TrueMBB->getBasicBlock());
-  FuncInfo.MBB->addSuccessor(TrueMBB, BranchWeight);
+  // Add TrueMBB as successor unless it is equal to the FalseMBB: This can
+  // happen in degenerate IR and MachineIR forbids to have a block twice in the
+  // successor/predecessor lists.
+  if (TrueMBB != FalseMBB)
+    FuncInfo.MBB->addSuccessor(TrueMBB, BranchWeight);
 
   fastEmitBranch(FalseMBB, DbgLoc);
 }

Modified: llvm/trunk/test/CodeGen/X86/fast-isel-cmp-branch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-cmp-branch.ll?rev=246074&r1=246073&r2=246074&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-cmp-branch.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-cmp-branch.ll Wed Aug 26 15:46:49 2015
@@ -1,5 +1,18 @@
-; RUN: llc -O0 -mtriple=x86_64-linux -asm-verbose=false < %s | FileCheck %s
-; RUN: llc -O0 -mtriple=x86_64-windows-itanium -asm-verbose=false < %s | FileCheck %s
+; RUN: llc -O0 -mtriple=x86_64-linux -asm-verbose=false -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -O0 -mtriple=x86_64-windows-itanium -asm-verbose=false -verify-machineinstrs < %s | FileCheck %s
+
+; Fast-isel mustn't add a block to the MBB successor/predecessor list twice.
+; The machine verifier will catch and complain about this case.
+; CHECK-LABEL: baz
+; CHECK: retq
+define void @baz() {
+entry:
+  br i1 undef, label %exit, label %exit
+
+exit:
+  ret void
+}
+
 ; rdar://8337108
 
 ; Fast-isel shouldn't try to look through the compare because it's in a