[PATCH] D12279: [mips][microMIPS] Implement ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions

[Zlatko Buljan via llvm-commits]

zbuljan updated this revision to Diff 33053.
zbuljan added a comment.

Comments updated with more information.
Tests for instructions are added in previous patch (http://reviews.llvm.org/D10955).


http://reviews.llvm.org/D12279

Files:
  lib/Target/Mips/Disassembler/MipsDisassembler.cpp
  lib/Target/Mips/MicroMips32r6InstrFormats.td
  lib/Target/Mips/MicroMips32r6InstrInfo.td

Index: lib/Target/Mips/MicroMips32r6InstrInfo.td
===================================================================
--- lib/Target/Mips/MicroMips32r6InstrInfo.td
+++ lib/Target/Mips/MicroMips32r6InstrInfo.td
@@ -20,6 +20,10 @@
 class ADDIU_MMR6_ENC : ADDI_FM_MMR6<"addiu", 0xc>;
 class ADDU_MMR6_ENC : ARITH_FM_MMR6<"addu", 0x150>;
 class ADDIUPC_MMR6_ENC : PCREL19_FM_MMR6<0b00>;
+class ADDIUR1SP_MMR6_ENC : ADDIUR1SP_FM_MM16, MicroMipsR6Inst16;
+class ADDIUR2_MMR6_ENC : ADDIUR2_FM_MM16, MicroMipsR6Inst16;
+class ADDIUS5_MMR6_ENC : ADDIUS5_FM_MM16, MicroMipsR6Inst16;
+class ADDIUSP_MMR6_ENC : ADDIUSP_FM_MM16, MicroMipsR6Inst16;
 class ALUIPC_MMR6_ENC : PCREL16_FM_MMR6<0b11111>;
 class AND_MMR6_ENC : ARITH_FM_MMR6<"and", 0x250>;
 class ANDI_MMR6_ENC : ADDI_FM_MMR6<"andi", 0x34>;
@@ -311,6 +315,13 @@
 class SW_MMR6_DESC : Store<"sw", GPR32Opnd>;
 class SWE_MMR6_DESC : SWE_MMR6_DESC_BASE<"swe", GPR32Opnd, mem_simm9gpr>;
 
+class ADDIUR1SP_MMR6_DESC : AddImmUR1SP<"addiur1sp", GPRMM16Opnd>,
+                            MMR6Arch<"addiur1sp">;
+class ADDIUR2_MMR6_DESC : AddImmUR2<"addiur2", GPRMM16Opnd>,
+                          MMR6Arch<"addiur2">;
+class ADDIUS5_MMR6_DESC : AddImmUS5<"addius5", GPR32Opnd>, MMR6Arch<"addius5">;
+class ADDIUSP_MMR6_DESC : AddImmUSP<"addiusp">, MMR6Arch<"addiusp">;
+
 //===----------------------------------------------------------------------===//
 //
 // Instruction Definitions
@@ -323,6 +334,14 @@
 def ADDU_MMR6 : StdMMR6Rel, ADDU_MMR6_DESC, ADDU_MMR6_ENC, ISA_MICROMIPS32R6;
 def ADDIUPC_MMR6 : R6MMR6Rel, ADDIUPC_MMR6_ENC, ADDIUPC_MMR6_DESC,
                    ISA_MICROMIPS32R6;
+def ADDIUR1SP_MMR6 : StdMMR6Rel, ADDIUR1SP_MMR6_DESC, ADDIUR1SP_MMR6_ENC,
+                     ISA_MICROMIPS32R6;
+def ADDIUR2_MMR6 : StdMMR6Rel, ADDIUR2_MMR6_DESC, ADDIUR2_MMR6_ENC,
+                   ISA_MICROMIPS32R6;
+def ADDIUS5_MMR6 : StdMMR6Rel, ADDIUS5_MMR6_DESC, ADDIUS5_MMR6_ENC,
+                   ISA_MICROMIPS32R6;
+def ADDIUSP_MMR6 : StdMMR6Rel, ADDIUSP_MMR6_DESC, ADDIUSP_MMR6_ENC,
+                   ISA_MICROMIPS32R6;
 def ALUIPC_MMR6 : R6MMR6Rel, ALUIPC_MMR6_ENC, ALUIPC_MMR6_DESC,
                   ISA_MICROMIPS32R6;
 def AND_MMR6 : StdMMR6Rel, AND_MMR6_DESC, AND_MMR6_ENC, ISA_MICROMIPS32R6;
Index: lib/Target/Mips/MicroMips32r6InstrFormats.td
===================================================================
--- lib/Target/Mips/MicroMips32r6InstrFormats.td
+++ lib/Target/Mips/MicroMips32r6InstrFormats.td
@@ -16,6 +16,12 @@
   string BaseOpcode = opstr;
 }
 
+// Class used for microMIPS32r6 and microMIPS64r6 instructions.
+class MicroMipsR6Inst16 : PredicateControl {
+  string DecoderNamespace = "MicroMipsR6";
+  let InsnPredicates = [HasMicroMips32r6];
+}
+
 class POOL32A_BITSWAP_FM_MMR6<bits<6> funct> : MipsR6Inst {
   bits<5> rd;
   bits<5> rt;
Index: lib/Target/Mips/Disassembler/MipsDisassembler.cpp
===================================================================
--- lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -836,10 +836,19 @@
   if (IsMicroMips) {
     Result = readInstruction16(Bytes, Address, Size, Insn, IsBigEndian);
 
-    DEBUG(dbgs() << "Trying MicroMips16 table (16-bit instructions):\n");
-    // Calling the auto-generated decoder function.
-    Result = decodeInstruction(DecoderTableMicroMips16, Instr, Insn, Address,
-                               this, STI);
+    if (hasMips32r6()) {
+      DEBUG(dbgs() << "Trying MicroMipsR616 table (16-bit instructions):\n");
+      // Calling the auto-generated decoder function for microMIPS32R6
+      // (and microMIPS64R6) 16-bit instructions.
+      Result = decodeInstruction(DecoderTableMicroMipsR616, Instr, Insn,
+                                 Address, this, STI);
+    } else {
+      DEBUG(dbgs() << "Trying MicroMips16 table (16-bit instructions):\n");
+      // Calling the auto-generated decoder function for microMIPS 16-bit
+      // instructions.
+      Result = decodeInstruction(DecoderTableMicroMips16, Instr, Insn, Address,
+                                this, STI);
+    }
     if (Result != MCDisassembler::Fail) {
       Size = 2;
       return Result;


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