[PATCH] D12276: [AArch64] Unify the integer min/max vector selection patterns with the intrinsic ones

James Molloy via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 24 12:50:06 PDT 2015


It would be my preferred approach, yes.
On Mon, 24 Aug 2015 at 14:50, silviu.baranga at arm.com via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> sbaranga added inline comments.
>
> ================
> Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:2187
> @@ -2186,1 +2186,3 @@
>    }
> +  case Intrinsic::aarch64_neon_smax:
> +  case Intrinsic::aarch64_neon_umax:
> ----------------
> jmolloy wrote:
> > I don't really like having the switch inside the switch - each case is
> just one line anyway, I think we're removing readability.
> In that case would removing this switch and having a
>
> return DAG.getNode(ISD::SMIN, dl, Op.getValueType(), ...)
>
> for each min/max case in the original switch be better here?
>
>
> http://reviews.llvm.org/D12276
>
>
>
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