[llvm] r245744 - [ARM] Fix MachO CPU Subtype selection
Renato Golin via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 21 16:03:45 PDT 2015
Yes, we're trying to move as much as possible in before we start the
TableGen work, so not to re-engineer it too much later.
It'd be good to get more MachO support in here, too.
Cheers,
Renato
On 21 Aug 2015 11:49 pm, "Vedant Kumar" <vsk at apple.com> wrote:
> IIRC, Renato mentioned in an earlier thread that there are plans to
> transition TargetParser to tablegen. I think so far ARMAsmParser and
> ARMAsmBackend are the only clients.
>
> If there's a change in TargetParser, there's a script that'll ping me.
> I'll make sure to clean up any affected MachO stuff.
>
> vedant
>
> > On Aug 21, 2015, at 3:44 PM, Eric Christopher <echristo at gmail.com>
> wrote:
> >
> > I think the TargetParser is a work in progress and not ready for general
> use yet? Renato?
> >
> > -eric
> >
> > On Fri, Aug 21, 2015 at 2:53 PM Vedant Kumar via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
> > Author: vedantk
> > Date: Fri Aug 21 16:52:48 2015
> > New Revision: 245744
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=245744&view=rev
> > Log:
> > [ARM] Fix MachO CPU Subtype selection
> >
> > Differential Revision: http://reviews.llvm.org/D12040
> >
> > Added:
> > llvm/trunk/test/CodeGen/ARM/MachO-subtypes.ll
> > Modified:
> > llvm/trunk/include/llvm/Support/TargetParser.h
> > llvm/trunk/lib/Support/TargetParser.cpp
> > llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
> >
> > Modified: llvm/trunk/include/llvm/Support/TargetParser.h
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetParser.h?rev=245744&r1=245743&r2=245744&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/include/llvm/Support/TargetParser.h (original)
> > +++ llvm/trunk/include/llvm/Support/TargetParser.h Fri Aug 21 16:52:48
> 2015
> > @@ -117,6 +117,7 @@ namespace ARM {
> > AK_ARMV7L,
> > AK_ARMV7HL,
> > AK_ARMV7S,
> > + AK_ARMV7K,
> > AK_LAST
> > };
> >
> >
> > Modified: llvm/trunk/lib/Support/TargetParser.cpp
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/TargetParser.cpp?rev=245744&r1=245743&r2=245744&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Support/TargetParser.cpp (original)
> > +++ llvm/trunk/lib/Support/TargetParser.cpp Fri Aug 21 16:52:48 2015
> > @@ -107,7 +107,8 @@ struct {
> > { "armv7", ARM::AK_ARMV7, "7", "v7",
> ARMBuildAttrs::CPUArch::v7 },
> > { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l",
> ARMBuildAttrs::CPUArch::v7 },
> > { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl",
> ARMBuildAttrs::CPUArch::v7 },
> > - { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s",
> ARMBuildAttrs::CPUArch::v7 }
> > + { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s",
> ARMBuildAttrs::CPUArch::v7 },
> > + { "armv7k", ARM::AK_ARMV7K, "7-K", "v7k",
> ARMBuildAttrs::CPUArch::v7 }
> > };
> > // List of Arch Extension names.
> > // FIXME: TableGen this.
> > @@ -662,6 +663,7 @@ unsigned ARMTargetParser::parseArchVersi
> > case ARM::AK_ARMV7HL:
> > case ARM::AK_ARMV7S:
> > case ARM::AK_ARMV7EM:
> > + case ARM::AK_ARMV7K:
> > return 7;
> > case ARM::AK_ARMV8A:
> > case ARM::AK_ARMV8_1A:
> >
> > Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp?rev=245744&r1=245743&r2=245744&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp (original)
> > +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp Fri Aug 21
> 16:52:48 2015
> > @@ -32,6 +32,7 @@
> > #include "llvm/Support/ELF.h"
> > #include "llvm/Support/ErrorHandling.h"
> > #include "llvm/Support/MachO.h"
> > +#include "llvm/Support/TargetParser.h"
> > #include "llvm/Support/raw_ostream.h"
> > using namespace llvm;
> >
> > @@ -743,6 +744,39 @@ void ARMAsmBackend::applyFixup(const MCF
> > }
> > }
> >
> > +static MachO::CPUSubTypeARM getMachOSubTypeFromArch(StringRef Arch) {
> > + unsigned AK = ARMTargetParser::parseArch(Arch);
> > + switch (AK) {
> > + default:
> > + return MachO::CPU_SUBTYPE_ARM_V7;
> > + case ARM::AK_ARMV4T:
> > + return MachO::CPU_SUBTYPE_ARM_V4T;
> > + case ARM::AK_ARMV6:
> > + case ARM::AK_ARMV6K:
> > + return MachO::CPU_SUBTYPE_ARM_V6;
> > + case ARM::AK_ARMV5:
> > + return MachO::CPU_SUBTYPE_ARM_V5;
> > + case ARM::AK_ARMV5T:
> > + case ARM::AK_ARMV5E:
> > + case ARM::AK_ARMV5TE:
> > + case ARM::AK_ARMV5TEJ:
> > + return MachO::CPU_SUBTYPE_ARM_V5TEJ;
> > + case ARM::AK_ARMV7:
> > + return MachO::CPU_SUBTYPE_ARM_V7;
> > + case ARM::AK_ARMV7S:
> > + return MachO::CPU_SUBTYPE_ARM_V7S;
> > + case ARM::AK_ARMV7K:
> > + return MachO::CPU_SUBTYPE_ARM_V7K;
> > + case ARM::AK_ARMV6M:
> > + case ARM::AK_ARMV6SM:
> > + return MachO::CPU_SUBTYPE_ARM_V6M;
> > + case ARM::AK_ARMV7M:
> > + return MachO::CPU_SUBTYPE_ARM_V7M;
> > + case ARM::AK_ARMV7EM:
> > + return MachO::CPU_SUBTYPE_ARM_V7EM;
> > + }
> > +}
> > +
> > MCAsmBackend *llvm::createARMAsmBackend(const Target &T,
> > const MCRegisterInfo &MRI,
> > const Triple &TheTriple,
> StringRef CPU,
> > @@ -751,18 +785,7 @@ MCAsmBackend *llvm::createARMAsmBackend(
> > default:
> > llvm_unreachable("unsupported object format");
> > case Triple::MachO: {
> > - MachO::CPUSubTypeARM CS =
> > - StringSwitch<MachO::CPUSubTypeARM>(TheTriple.getArchName())
> > - .Cases("armv4t", "thumbv4t", MachO::CPU_SUBTYPE_ARM_V4T)
> > - .Cases("armv5e", "thumbv5e", MachO::CPU_SUBTYPE_ARM_V5TEJ)
> > - .Cases("armv6", "thumbv6", MachO::CPU_SUBTYPE_ARM_V6)
> > - .Cases("armv6m", "thumbv6m", MachO::CPU_SUBTYPE_ARM_V6M)
> > - .Cases("armv7em", "thumbv7em", MachO::CPU_SUBTYPE_ARM_V7EM)
> > - .Cases("armv7k", "thumbv7k", MachO::CPU_SUBTYPE_ARM_V7K)
> > - .Cases("armv7m", "thumbv7m", MachO::CPU_SUBTYPE_ARM_V7M)
> > - .Cases("armv7s", "thumbv7s", MachO::CPU_SUBTYPE_ARM_V7S)
> > - .Default(MachO::CPU_SUBTYPE_ARM_V7);
> > -
> > + MachO::CPUSubTypeARM CS =
> getMachOSubTypeFromArch(TheTriple.getArchName());
> > return new ARMAsmBackendDarwin(T, TheTriple, CS);
> > }
> > case Triple::COFF:
> >
> > Added: llvm/trunk/test/CodeGen/ARM/MachO-subtypes.ll
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/MachO-subtypes.ll?rev=245744&view=auto
> >
> ==============================================================================
> > --- llvm/trunk/test/CodeGen/ARM/MachO-subtypes.ll (added)
> > +++ llvm/trunk/test/CodeGen/ARM/MachO-subtypes.ll Fri Aug 21 16:52:48
> 2015
> > @@ -0,0 +1,68 @@
> > +; Check that MachO ARM CPU Subtypes are respected
> > +
> > +; RUN: llc -mtriple=armv4t-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V4T
> > +
> > +; RUN: llc -mtriple=armv5-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V5
> > +; RUN: llc -mtriple=armv5e-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V5
> > +; RUN: llc -mtriple=armv5t-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V5
> > +; RUN: llc -mtriple=armv5te-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V5
> > +; RUN: llc -mtriple=armv5tej-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V5
> > +
> > +; RUN: llc -mtriple=armv6-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V6
> > +; RUN: llc -mtriple=armv6k-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V6
> > +; RUN: llc -mtriple=thumbv6-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V6
> > +; RUN: llc -mtriple=thumbv6k-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V6
> > +
> > +; RUN: llc -mtriple=armv6m-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V6M
> > +; RUN: llc -mtriple=thumbv6m-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V6M
> > +
> > +; RUN: llc -mtriple=armv7-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7
> > +; RUN: llc -mtriple=thumbv7-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7
> > +
> > +; RUN: llc -mtriple=thumbv7em-apple-darwin -mcpu=cortex-m4
> -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7EM
> > +; RUN: llc -mtriple=thumbv7em-apple-darwin -mcpu=cortex-m7
> -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7EM
> > +
> > +; RUN: llc -mtriple=armv7k-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7K
> > +; RUN: llc -mtriple=thumbv7k-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7K
> > +
> > +; RUN: llc -mtriple=thumbv7m-apple-darwin -mcpu=sc300 -filetype=obj -o
> - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7M
> > +; RUN: llc -mtriple=thumbv7m-apple-darwin -mcpu=cortex-m3 -filetype=obj
> -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7M
> > +
> > +; RUN: llc -mtriple=armv7s-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7S
> > +; RUN: llc -mtriple=thumbv7s-apple-darwin -filetype=obj -o - < %s \
> > +; RUN: | llvm-readobj -file-headers | FileCheck %s
> --check-prefix=CHECK-V7S
> > +
> > +define void @_test() {
> > + ret void
> > +}
> > +
> > +; CHECK-V4T: CpuSubType: CPU_SUBTYPE_ARM_V4T (0x5)
> > +; CHECK-V5: CpuSubType: CPU_SUBTYPE_ARM_V5 (0x7)
> > +; CHECK-V6: CpuSubType: CPU_SUBTYPE_ARM_V6 (0x6)
> > +; CHECK-V6M: CpuSubType: CPU_SUBTYPE_ARM_V6M (0xE)
> > +; CHECK-V7: CpuSubType: CPU_SUBTYPE_ARM_V7 (0x9)
> > +; CHECK-V7EM: CpuSubType: CPU_SUBTYPE_ARM_V7EM (0x10)
> > +; CHECK-V7K: CpuSubType: CPU_SUBTYPE_ARM_V7K (0xC)
> > +; CHECK-V7M: CpuSubType: CPU_SUBTYPE_ARM_V7M (0xF)
> > +; CHECK-V7S: CpuSubType: CPU_SUBTYPE_ARM_V7S (0xB)
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at lists.llvm.org
> > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
>
>
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