[PATCH] D12149: [AArch64] Turn on by default interleaved access vectorization

[Renato Golin via llvm-commits]

rengolin added a comment.

In http://reviews.llvm.org/D12149#228827, @sbaranga wrote:

> I suspect it wouldn't be beneficial unless the architectures backend has a way of efficiently lowering the load + shuffles to a reasonably fast instruction sequence (and this should also be reflected in the cost model). I had to do a number of fixes of fixes for ARM/AArch64 to remove the regressions I've found, so I wouldn't turn this on elsewhere without data.


I believe Intel's AVX512 has interleaved access that can be used to profit from strided vectorization, but that's up to the Intel folks to implement, test and benchmark.


http://reviews.llvm.org/D12149