[PATCH] D12154: [x86] invert logic for attribute 'FeatureFastUAMem'

[Simon Pilgrim via llvm-commits]

RKSimon added inline comments.

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Comment at: lib/Target/X86/X86.td:489
@@ -486,1 +488,3 @@
+                               FeatureFSGSBase, FeatureSlowUAMem]>;
 
+def : Proc<"geode",           [FeatureSlowUAMem, Feature3DNowA]>;
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You can drop FeatureSlowUAMem for BD targets - the AMD 15h SOG confirms that unaligned performance should be the same for aligned addresses and only +1cy for unaligned. It might be more complex for cache-line crossing but most targets will suffer there, not just BD.


http://reviews.llvm.org/D12154