[PATCH] D11938: [InstCombine] SSE/AVX vector shifts demanded shift amount bits

[Simon Pilgrim via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: andreadb, mkuper, majnemer.
RKSimon added a subscriber: llvm-commits.
RKSimon set the repository for this revision to rL LLVM.

Most SSE/AVX (non-constant) vector shift instructions only use the lower 64-bits of the 128-bit shift amount vector operand, this patch calls SimplifyDemandedVectorElts to optimize for this.

I had to refactor some of my recent InstCombiner work on the vector shifts to avoid quite a bit of duplicate code. it means that SimplifyX86immshift now (re)decodes the type of shift.

Repository:
  rL LLVM

http://reviews.llvm.org/D11938

Files:
  lib/Transforms/InstCombine/InstCombineCalls.cpp
  test/Transforms/InstCombine/x86-vector-shifts.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D11938.31803.patch
Type: text/x-patch
Size: 13155 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150811/1c0e1e1c/attachment.bin>