[PATCH] D11674: [mips][microMIPS] Implement ABS.fmt, CEIL.L.fmt, CEIL.W.fmt, FLOOR.L.fmt, FLOOR.W.fmt, TRUNC.L.fmt, TRUNC.W.fmt, RSQRT.fmt and SQRT.fmt instructions

[Daniel Sanders via llvm-commits]

dsanders requested changes to this revision.
This revision now requires changes to proceed.

================
Comment at: lib/Target/Mips/MicroMips32r6InstrFormats.td:290-319
@@ -289,1 +289,31 @@
 }
+
+class ABS_FM_MMR6<string instr_asm, bits<2> fmt, bits<7> funct> : MMR6Arch<instr_asm>, MipsR6Inst {
+  bits<5> ft;
+  bits<5> fs;
+
+  bits<32> Inst;
+
+  let Inst{31-26} = 0b010101;
+  let Inst{25-21} = ft;
+  let Inst{20-16} = fs;
+  let Inst{15}    = 0;
+  let Inst{14-13} = fmt;
+  let Inst{12-6}  = funct;
+  let Inst{5-0}   = 0b111011;
+}
+
+class FLOOR_FM_MMR6<string instr_asm, bits<1> fmt, bits<8> funct> : MMR6Arch<instr_asm>, MipsR6Inst {
+  bits<5> ft;
+  bits<5> fs;
+
+  bits<32> Inst;
+
+  let Inst{31-26} = 0b010101;
+  let Inst{25-21} = ft;
+  let Inst{20-16} = fs;
+  let Inst{15}    = 0;
+  let Inst{14}    = fmt;
+  let Inst{13-6}  = funct;
+  let Inst{5-0}   = 0b111011;
+}
----------------
As with the other patches, these need to follow the naming convention:
  POOL32F_<misc>_FM

================
Comment at: lib/Target/Mips/MicroMips32r6InstrInfo.td:71-89
@@ -70,1 +70,21 @@
 class XORI_MMR6_ENC : ADDI_FM_MMR6<"xori", 0x1c>;
+class ABS_MMR6_S_ENC : ABS_FM_MMR6<"abs.s", 0, 0b0001101>;
+class ABS_MMR6_ENC : ABS_FM_MMR6<"abs.d", 1, 0b0001101>;
+class FLOOR_L_MMR6_S_ENC : FLOOR_FM_MMR6<"floor.l.s", 0, 0b00001100>;
+class FLOOR_L_MMR6_ENC : FLOOR_FM_MMR6<"floor.l.d", 1, 0b00001100>;
+class FLOOR_W_S_MMR6_ENC : FLOOR_FM_MMR6<"floor.w.s", 0, 0b00101100>;
+class FLOOR_W_MMR6_ENC : FLOOR_FM_MMR6<"floor.w.d", 1, 0b00101100>;
+class CEIL_L_S_MMR6_ENC : FLOOR_FM_MMR6<"ceil.l.s", 0, 0b01001100>;
+class CEIL_L_MMR6_ENC : FLOOR_FM_MMR6<"ceil.l.d", 1, 0b01001100>;
+class CEIL_W_S_MMR6_ENC : FLOOR_FM_MMR6<"ceil.w.s", 0, 0b01101100>;
+class CEIL_W_MMR6_ENC : FLOOR_FM_MMR6<"ceil.w.d", 1, 0b01101100>;
+class TRUNC_L_S_MMR6_ENC : FLOOR_FM_MMR6<"trunc.l.s", 0, 0b10001100>;
+class TRUNC_L_MMR6_ENC : FLOOR_FM_MMR6<"trunc.l.d", 1, 0b10001100>;
+class TRUNC_W_S_MMR6_ENC : FLOOR_FM_MMR6<"trunc.w.s", 0, 0b10101100>;
+class TRUNC_W_MMR6_ENC : FLOOR_FM_MMR6<"trunc.w.d", 1, 0b10101100>;
+
+class SQRT_S_MMR6_ENC : FLOOR_FM_MMR6<"sqrt.s", 0, 0b00101000>;
+class SQRT_MMR6_ENC : FLOOR_FM_MMR6<"sqrt.d", 1, 0b00101000>;
+class RSQRT_S_MMR6_ENC : FLOOR_FM_MMR6<"rsqrt.s", 0, 0b00001000>;
+class RSQRT_MMR6_ENC : FLOOR_FM_MMR6<"rsqrt.d", 1, 0b00001000>;
+
----------------
The double precision instructions should have a '_D' in the same way as the single precision ones have '_S'

Also, there's some inconsistency in where the '_S' appears in these. Most have it before the 'MMR6' but a couple have it after.

================
Comment at: lib/Target/Mips/MicroMips32r6InstrInfo.td:90
@@ -71,1 +89,3 @@
+class RSQRT_MMR6_ENC : FLOOR_FM_MMR6<"rsqrt.d", 1, 0b00001000>;
+
 
----------------
Nit: Extra line of whitespace

================
Comment at: lib/Target/Mips/MicroMips32r6InstrInfo.td:301-302
@@ +300,4 @@
+class ABSS_FT_MMR6_DESC_BASE<string instr_asm, RegisterOperand DstRC,
+                             RegisterOperand SrcRC,InstrItinClass Itin,
+                             SDPatternOperator OpNode= null_frag>
+    : HARDFLOAT, NeverHasSideEffects {
----------------
Nit: space after comma and space either side of equals

================
Comment at: lib/Target/Mips/MicroMips32r6InstrInfo.td:430
@@ +429,3 @@
+def FLOOR_W_S_MMR6 : StdMMR6Rel, FLOOR_W_S_MMR6_ENC, FLOOR_W_S_MMR6_DESC,
+                     ISA_MICROMIPS32R6;
+def FLOOR_W_MMR6 : StdMMR6Rel, FLOOR_W_MMR6_ENC, FLOOR_W_MMR6_DESC,
----------------
Nit: Indentation. Likewise below

================
Comment at: lib/Target/Mips/MipsInstrFPU.td:272
@@ -271,2 +271,3 @@
                  ABSS_FM<0xc, 16>, ISA_MIPS2;
-def TRUNC_W_S  : MMRel, ABSS_FT<"trunc.w.s", FGR32Opnd, FGR32Opnd, II_TRUNC>,
+let AdditionalPredicates = [NotMips32r6] in {
+def TRUNC_W_S  : MMRel, StdMMR6Rel, ABSS_FT<"trunc.w.s", FGR32Opnd, FGR32Opnd, II_TRUNC>,
----------------
I think you mean 'NotMicroMips32r6'. They are present in Mips32r6.

================
Comment at: lib/Target/Mips/MipsInstrFPU.td:294
@@ -291,2 +293,3 @@
                     ABSS_FM<0x8, 17>, FGR_64;
+  let AdditionalPredicates = [NotMips32r6] in {
   def TRUNC_L_S : ABSS_FT<"trunc.l.s", FGR64Opnd, FGR32Opnd, II_TRUNC>,
----------------
I think you mean 'NotMicroMips32r6'

================
Comment at: lib/Target/Mips/MipsInstrFPU.td:352
@@ -347,2 +351,3 @@
 
+let AdditionalPredicates = [NotMips32r6] in {
 def FSQRT_S : MMRel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd, II_SQRT_S, fsqrt>,
----------------
I think you mean 'NotMicroMips32r6'

================
Comment at: test/MC/Disassembler/Mips/micromips32r6.txt:150
@@ +149,2 @@
+0x54 0x44 0x42 0x3b # CHECK: rsqrt.d $f2, $f4
+
----------------
Blank line at EOF


http://reviews.llvm.org/D11674