[llvm] r244352 - Add Intel family 6 model 90 as Silvermont. Fixes PR24392.

[Craig Topper via llvm-commits]

Thanks will do.

On Fri, Aug 7, 2015 at 3:38 PM, H.J. Lu <hjl.tools at gmail.com> wrote:

> On Fri, Aug 7, 2015 at 1:09 PM, Craig Topper via llvm-commits
> <llvm-commits at lists.llvm.org> wrote:
> > Author: ctopper
> > Date: Fri Aug  7 15:09:42 2015
> > New Revision: 244352
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=244352&view=rev
> > Log:
> > Add Intel family 6 model 90 as Silvermont. Fixes PR24392.
> >
> > Modified:
> >     llvm/trunk/lib/Support/Host.cpp
> >
> > Modified: llvm/trunk/lib/Support/Host.cpp
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=244352&r1=244351&r2=244352&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Support/Host.cpp (original)
> > +++ llvm/trunk/lib/Support/Host.cpp Fri Aug  7 15:09:42 2015
> > @@ -381,6 +381,7 @@ StringRef sys::getHostCPUName() {
> >        case 55:
> >        case 74:
> >        case 77:
> > +      case 90:
> >          return "silvermont";
> >
> >        default: // Unknown family 6 CPU, try to guess.
> >
>
> From Intel SDM vol 3:
>
> 19.11
> PERFORMANCE MONITORING EVENTS FOR PROCESSORS BASED ON THE
> SILVERMONT MICROARCHITECTURE
> Processors based on the Silvermont microarchitecture support the
> architectural performance-monitoring events
> listed in Table 19-1 and fixed-function performance events using fixed
> counter. In addition, they also support the
> following non-architectural performance-monitoring events listed in
> Table 19-23. These processors have the CPUID
> signatures of 06_37H, 06_4AH, 06_4DH, 06_5AH, and 06_5DH.
>
> You should also include 93 (5DH).
>
> --
> H.J.
>



-- 
~Craig
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