<div dir="ltr">Thanks will do.</div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Aug 7, 2015 at 3:38 PM, H.J. Lu <span dir="ltr"><<a href="mailto:hjl.tools@gmail.com" target="_blank">hjl.tools@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">On Fri, Aug 7, 2015 at 1:09 PM, Craig Topper via llvm-commits<br>
<<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br>
> Author: ctopper<br>
> Date: Fri Aug  7 15:09:42 2015<br>
> New Revision: 244352<br>
><br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=244352&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=244352&view=rev</a><br>
> Log:<br>
> Add Intel family 6 model 90 as Silvermont. Fixes PR24392.<br>
><br>
> Modified:<br>
>     llvm/trunk/lib/Support/Host.cpp<br>
><br>
> Modified: llvm/trunk/lib/Support/Host.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=244352&r1=244351&r2=244352&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=244352&r1=244351&r2=244352&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Support/Host.cpp (original)<br>
> +++ llvm/trunk/lib/Support/Host.cpp Fri Aug  7 15:09:42 2015<br>
> @@ -381,6 +381,7 @@ StringRef sys::getHostCPUName() {<br>
>        case 55:<br>
>        case 74:<br>
>        case 77:<br>
> +      case 90:<br>
>          return "silvermont";<br>
><br>
>        default: // Unknown family 6 CPU, try to guess.<br>
><br>
<br>
>From Intel SDM vol 3:<br>
<br>
19.11<br>
PERFORMANCE MONITORING EVENTS FOR PROCESSORS BASED ON THE<br>
SILVERMONT MICROARCHITECTURE<br>
Processors based on the Silvermont microarchitecture support the<br>
architectural performance-monitoring events<br>
listed in Table 19-1 and fixed-function performance events using fixed<br>
counter. In addition, they also support the<br>
following non-architectural performance-monitoring events listed in<br>
Table 19-23. These processors have the CPUID<br>
signatures of 06_37H, 06_4AH, 06_4DH, 06_5AH, and 06_5DH.<br>
<br>
You should also include 93 (5DH).<br>
<span class="HOEnZb"><font color="#888888"><br>
--<br>
H.J.<br>
</font></span></blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature">~Craig</div>
</div>