[PATCH] D11428: Improve EmitLoweredSelect for contiguous pseudo CMOV instructions.

[Kevin B. Smith]

kbsmith1 added a comment.

Added inline comment.


================
Comment at: test/CodeGen/X86/pseudo_cmov_lower.ll:219-224
@@ +218,8 @@
+; get lowered into vector length number of selects, which all eventually turn
+; into a huge number of CMOV_GR8, which are all contiguous, so the optimization
+; kicks in as long as CMOV_GR8 is supported. I couldn't find a way to get
+; CMOV_V*I1 pseudo-opcodes to get generated. If a way exists to get CMOV_V*1
+; pseudo-opcodes to be generated, this test should be replaced with one that
+; tests those opcodes.
+;
+; CHECK-LABEL: foo9:
----------------
ab wrote:
> Does enabling, say, avx512f work?
I will look into that.  If it does, then I will remove this specific test, and add such a necessary test back as a separate test file in a separate change set.


http://reviews.llvm.org/D11428