[llvm] r242493 - Use small encodings for constants when possible.
Rafael Espindola
rafael.espindola at gmail.com
Thu Jul 16 17:57:52 PDT 2015
Author: rafael
Date: Thu Jul 16 19:57:52 2015
New Revision: 242493
URL: http://llvm.org/viewvc/llvm-project?rev=242493&view=rev
Log:
Use small encodings for constants when possible.
Added:
llvm/trunk/test/CodeGen/X86/and-encoding.ll
Removed:
llvm/trunk/test/CodeGen/X86/pr21529.ll
Modified:
llvm/trunk/lib/Target/X86/X86InstrCompiler.td
Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=242493&r1=242492&r2=242493&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Thu Jul 16 19:57:52 2015
@@ -1077,11 +1077,11 @@ defm : CMOVmr<X86_COND_NO, CMOVO16rm , C
// zextload bool -> zextload byte
def : Pat<(zextloadi8i1 addr:$src), (AND8ri (MOV8rm addr:$src), (i8 1))>;
-def : Pat<(zextloadi16i1 addr:$src), (AND16ri (MOVZX16rm8 addr:$src), (i16 1))>;
-def : Pat<(zextloadi32i1 addr:$src), (AND32ri (MOVZX32rm8 addr:$src), (i32 1))>;
+def : Pat<(zextloadi16i1 addr:$src), (AND16ri8 (MOVZX16rm8 addr:$src), (i16 1))>;
+def : Pat<(zextloadi32i1 addr:$src), (AND32ri8 (MOVZX32rm8 addr:$src), (i32 1))>;
def : Pat<(zextloadi64i1 addr:$src),
(SUBREG_TO_REG (i64 0),
- (AND32ri (MOVZX32rm8 addr:$src), (i32 1)), sub_32bit)>;
+ (AND32ri8 (MOVZX32rm8 addr:$src), (i32 1)), sub_32bit)>;
// extload bool -> extload byte
// When extloading from 16-bit and smaller memory locations into 64-bit
Added: llvm/trunk/test/CodeGen/X86/and-encoding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/and-encoding.ll?rev=242493&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/and-encoding.ll (added)
+++ llvm/trunk/test/CodeGen/X86/and-encoding.ll Thu Jul 16 19:57:52 2015
@@ -0,0 +1,41 @@
+; RUN: llc -show-mc-encoding < %s | FileCheck %s
+
+; Test that the direct object emission selects the and variant with 8 bit
+; immediate.
+; We used to get this wrong when using direct object emission, but not when
+; reading assembly.
+
+
+target triple = "x86_64-pc-linux"
+
+define void @f1() {
+; CHECK-LABEL: f1:
+; CHECK: andq $-32, %rsp # encoding: [0x48,0x83,0xe4,0xe0]
+ %foo = alloca i8, align 32
+ ret void
+}
+
+define void @f2(i1 *%x, i16 *%y) {
+; CHECK-LABEL: f2:
+; CHECK: andl $1, %eax # encoding: [0x83,0xe0,0x01]
+ %a = load i1, i1* %x
+ %b = zext i1 %a to i16
+ store i16 %b, i16* %y
+ ret void
+}
+
+define i32 @f3(i1 *%x) {
+; CHECK-LABEL: f3:
+; CHECK: andl $1, %eax # encoding: [0x83,0xe0,0x01]
+ %a = load i1, i1* %x
+ %b = zext i1 %a to i32
+ ret i32 %b
+}
+
+define i64 @f4(i1 *%x) {
+; CHECK-LABEL: f4:
+; CHECK: andl $1, %eax # encoding: [0x83,0xe0,0x01]
+ %a = load i1, i1* %x
+ %b = zext i1 %a to i64
+ ret i64 %b
+}
Removed: llvm/trunk/test/CodeGen/X86/pr21529.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr21529.ll?rev=242492&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr21529.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr21529.ll (removed)
@@ -1,15 +0,0 @@
-; RUN: llc -show-mc-encoding < %s | FileCheck %s
-
-; Test that the direct object emission selects the and variant with 8 bit
-; immediate.
-; We used to get this wrong when using direct object emission, but not when
-; reading assembly.
-
-; CHECK: andq $-32, %rsp # encoding: [0x48,0x83,0xe4,0xe0]
-
-target triple = "x86_64-pc-linux"
-
-define void @f() {
- %foo = alloca i8, align 32
- ret void
-}
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