[llvm] r242491 - MIR Serialization: Serialize the frame setup machine instruction flag.
Alex Lorenz
arphaman at gmail.com
Thu Jul 16 17:24:15 PDT 2015
Author: arphaman
Date: Thu Jul 16 19:24:15 2015
New Revision: 242491
URL: http://llvm.org/viewvc/llvm-project?rev=242491&view=rev
Log:
MIR Serialization: Serialize the frame setup machine instruction flag.
Added:
llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
Modified:
llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
llvm/trunk/lib/CodeGen/MIRPrinter.cpp
Modified: llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp?rev=242491&r1=242490&r2=242491&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp Thu Jul 16 19:24:15 2015
@@ -73,6 +73,7 @@ static MIToken::TokenKind getIdentifierK
.Case("dead", MIToken::kw_dead)
.Case("killed", MIToken::kw_killed)
.Case("undef", MIToken::kw_undef)
+ .Case("frame-setup", MIToken::kw_frame_setup)
.Default(MIToken::Identifier);
}
Modified: llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MILexer.h?rev=242491&r1=242490&r2=242491&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MILexer.h (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MILexer.h Thu Jul 16 19:24:15 2015
@@ -43,6 +43,7 @@ struct MIToken {
kw_dead,
kw_killed,
kw_undef,
+ kw_frame_setup,
// Identifier tokens
Identifier,
Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=242491&r1=242490&r2=242491&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp Thu Jul 16 19:24:15 2015
@@ -107,7 +107,7 @@ private:
/// instruction name is invalid.
bool parseInstrName(StringRef InstrName, unsigned &OpCode);
- bool parseInstruction(unsigned &OpCode);
+ bool parseInstruction(unsigned &OpCode, unsigned &Flags);
bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
const MCInstrDesc &MCID);
@@ -175,11 +175,11 @@ bool MIParser::parse(MachineInstr *&MI)
lex();
}
- unsigned OpCode;
- if (Token.isError() || parseInstruction(OpCode))
+ unsigned OpCode, Flags = 0;
+ if (Token.isError() || parseInstruction(OpCode, Flags))
return true;
- // TODO: Parse the instruction flags and memory operands.
+ // TODO: Parse the bundle instruction flags and memory operands.
// Parse the remaining machine operands.
while (Token.isNot(MIToken::Eof)) {
@@ -203,6 +203,7 @@ bool MIParser::parse(MachineInstr *&MI)
// TODO: Check for extraneous machine operands.
MI = MF.CreateMachineInstr(MCID, DebugLoc(), /*NoImplicit=*/true);
+ MI->setFlags(Flags);
for (const auto &Operand : Operands)
MI->addOperand(MF, Operand.Operand);
return false;
@@ -295,7 +296,11 @@ bool MIParser::verifyImplicitOperands(
return false;
}
-bool MIParser::parseInstruction(unsigned &OpCode) {
+bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
+ if (Token.is(MIToken::kw_frame_setup)) {
+ Flags |= MachineInstr::FrameSetup;
+ lex();
+ }
if (Token.isNot(MIToken::Identifier))
return error("expected a machine instruction");
StringRef InstrName = Token.stringValue();
Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=242491&r1=242490&r2=242491&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Thu Jul 16 19:24:15 2015
@@ -334,8 +334,10 @@ void MIPrinter::print(const MachineInstr
if (I)
OS << " = ";
+ if (MI.getFlag(MachineInstr::FrameSetup))
+ OS << "frame-setup ";
OS << TII->getName(MI.getOpcode());
- // TODO: Print the instruction flags, machine mem operands.
+ // TODO: Print the bundling instruction flags, machine mem operands.
if (I < E)
OS << ' ';
Added: llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir?rev=242491&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir Thu Jul 16 19:24:15 2015
@@ -0,0 +1,39 @@
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# This test ensures that the MIR parser parses the frame setup instruction flag.
+
+--- |
+
+ define i32 @compute(i32 %a) {
+ body:
+ %c = mul i32 %a, 11
+ ret i32 %c
+ }
+
+ define i32 @foo(i32 %a) {
+ entry:
+ %b = call i32 @compute(i32 %a)
+ ret i32 %b
+ }
+
+...
+---
+name: compute
+body:
+ - name: body
+ id: 0
+ instructions:
+ - '%eax = IMUL32rri8 %edi, 11, implicit-def %eflags'
+ - 'RETQ %eax'
+...
+---
+name: foo
+body:
+ - name: entry
+ id: 0
+ instructions:
+ # CHECK: frame-setup PUSH64r %rax
+ - 'frame-setup PUSH64r %rax, implicit-def %rsp, implicit %rsp'
+ - 'CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax'
+ - '%rdx = POP64r implicit-def %rsp, implicit %rsp'
+ - 'RETQ %eax'
+...
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