[PATCH] D11131: [ARM] Add Thumb2 ADD with SP narrowing from 3 operand to 2
scott douglass
sdouglass at arm.com
Mon Jul 13 06:24:39 PDT 2015
scott-0 added a comment.
Thanks for the review!
There is 'add sp, sp, #4' in basic-thumb-instructions.s and 'add sp, sp, #0x1fe0000' in basic-thumb2-instructions.s
I'm also going to make thumb_rewrites.s pass for Thumb2, too; but it requires an additional fix.
[By the way, I considered writing the 'TryTransform' logic as just one 'if':
if (Mnemonic != "add" ||
!(Op3Reg == ARM::PC || Op4Reg == ARM::PC ||
(Op5.isReg() && Op5.getReg() == ARM::PC) ||
((Op3Reg == ARM::SP || Op4Reg == ARM::SP ||
(Op5.isReg() && Op5.getReg() == ARM::SP)) &&
!(Op3Reg == ARM::SP && Op4Reg == ARM::SP &&
Op5.isImm() && !Op5.isImm0_1020s4()))))
return;
but I thought it was a bit easier to follow with the intermediate steps.]
http://reviews.llvm.org/D11131
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