[PATCH] [AArch64] Allow negative immediates for ADD/SUB in asm

[Tim Northover]

Can't this be done as a simple InstAlias? The operand type even seems to exist already to support CodeGen (neg_addsub_shifted_imm, though it's a bit weird). You'd need a slightly adapted isNegAddSubImm and addNegAddSubImm methods, but you'd get your shifted values practically for free.


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  rL LLVM

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Comment at: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:3324-3325
@@ +3323,4 @@
+    return 0;
+  // FIXME: Can we swap those?
+  case AArch64::ADDSWri:
+  case AArch64::ADDSXri:
----------------
The immediate form, we probably can. As I recall the edge cases where the transformation is invalid occur when the RHS is U?INT_(MIN|MAX). The shifted 12-bit immediates never are, so it should be OK.

http://reviews.llvm.org/D10810

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