Fwd: [PATCH] X86: Reject register operands with obvious type mismatches.

[Matthias Braun]

> Begin forwarded message:
> 
> From: Nadav Rotem <nrotem at apple.com>
> Subject: Re: [PATCH] X86: Reject register operands with obvious type mismatches.
> Date: June 4, 2015 at 5:02:26 PM PDT
> To: Matthias Braun <mbraun at apple.com>
> 
> You know this code better than me. :) FWIW, I think that the change looks good. 
> 
> -Nadav
> 
> 
>> On Jun 4, 2015, at 4:25 PM, Matthias Braun <matze at braunis.de> wrote:
>> 
>> Hi nadav,
>> 
>> While we have some code to transform specification like {ax} into
>> {eax}/{rax} if the operand type isn't 16bit, we should reject cases
>> where there is no sane way to do this, like the i128 type in the
>> example.
>> 
>> REPOSITORY
>> rL LLVM
>> 
>> http://reviews.llvm.org/D10260
>> 
>> Files:
>> lib/Target/X86/X86ISelLowering.cpp
>> test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
>> 
>> Index: lib/Target/X86/X86ISelLowering.cpp
>> ===================================================================
>> --- lib/Target/X86/X86ISelLowering.cpp
>> +++ lib/Target/X86/X86ISelLowering.cpp
>> @@ -25502,6 +25502,10 @@
>>        Res.first = DestReg;
>>        Res.second = &X86::GR64RegClass;
>>      }
>> +    } else if (VT != MVT::Other) {
>> +      // Abort if this was not for a clobber.
>> +      Res.first = 0;
>> +      Res.second = nullptr;
>>    }
>>  } else if (Res.second == &X86::FR32RegClass ||
>>             Res.second == &X86::FR64RegClass ||
>> @@ -25527,6 +25531,15 @@
>>      Res.second = &X86::VR256RegClass;
>>    else if (X86::VR512RegClass.hasType(VT))
>>      Res.second = &X86::VR512RegClass;
>> +    else if (VT != MVT::Other) {
>> +      // Abort if this was not for a clobber.
>> +      Res.first = 0;
>> +      Res.second = nullptr;
>> +    }
>> +  } else if (VT != MVT::Other) {
>> +    // Abort if this was not for a clobber.
>> +    Res.first = 0;
>> +    Res.second = nullptr;
>>  }
>> 
>>  return Res;
>> Index: test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
>> ===================================================================
>> --- /dev/null
>> +++ test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
>> @@ -0,0 +1,10 @@
>> +; RUN: not llc -no-integrated-as %s -o - 2> %t1
>> +; RUN: FileCheck %s < %t1
>> +target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
>> +target triple = "x86_64--"
>> +
>> +; CHECK: error: couldn't allocate output register for constraint '{ax}'
>> +define i128 @blup() {
>> +  %v = tail call i128 asm "", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i128 0)
>> +  ret i128 %v
>> +}
>> 
>> EMAIL PREFERENCES
>> http://reviews.llvm.org/settings/panel/emailpreferences/
>> <D10260.27157.patch>
> 

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