<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class=""><br class=""><div><br class=""><blockquote type="cite" class=""><div class="">Begin forwarded message:</div><br class="Apple-interchange-newline"><div style="margin-top: 0px; margin-right: 0px; margin-bottom: 0px; margin-left: 0px;" class=""><span style="font-family: -webkit-system-font, Helvetica Neue, Helvetica, sans-serif; color:rgba(0, 0, 0, 1.0);" class=""><b class="">From: </b></span><span style="font-family: -webkit-system-font, Helvetica Neue, Helvetica, sans-serif;" class="">Nadav Rotem <<a href="mailto:nrotem@apple.com" class="">nrotem@apple.com</a>><br class=""></span></div><div style="margin-top: 0px; margin-right: 0px; margin-bottom: 0px; margin-left: 0px;" class=""><span style="font-family: -webkit-system-font, Helvetica Neue, Helvetica, sans-serif; color:rgba(0, 0, 0, 1.0);" class=""><b class="">Subject: </b></span><span style="font-family: -webkit-system-font, Helvetica Neue, Helvetica, sans-serif;" class=""><b class="">Re: [PATCH] X86: Reject register operands with obvious type mismatches.</b><br class=""></span></div><div style="margin-top: 0px; margin-right: 0px; margin-bottom: 0px; margin-left: 0px;" class=""><span style="font-family: -webkit-system-font, Helvetica Neue, Helvetica, sans-serif; color:rgba(0, 0, 0, 1.0);" class=""><b class="">Date: </b></span><span style="font-family: -webkit-system-font, Helvetica Neue, Helvetica, sans-serif;" class="">June 4, 2015 at 5:02:26 PM PDT<br class=""></span></div><div style="margin-top: 0px; margin-right: 0px; margin-bottom: 0px; margin-left: 0px;" class=""><span style="font-family: -webkit-system-font, Helvetica Neue, Helvetica, sans-serif; color:rgba(0, 0, 0, 1.0);" class=""><b class="">To: </b></span><span style="font-family: -webkit-system-font, Helvetica Neue, Helvetica, sans-serif;" class="">Matthias Braun <<a href="mailto:mbraun@apple.com" class="">mbraun@apple.com</a>><br class=""></span></div><br class=""><div class="">You know this code better than me. :) FWIW, I think that the change looks good. <br class=""><br class="">-Nadav<br class=""><br class=""><br class=""><blockquote type="cite" class="">On Jun 4, 2015, at 4:25 PM, Matthias Braun <<a href="mailto:matze@braunis.de" class="">matze@braunis.de</a>> wrote:<br class=""><br class="">Hi nadav,<br class=""><br class="">While we have some code to transform specification like {ax} into<br class="">{eax}/{rax} if the operand type isn't 16bit, we should reject cases<br class="">where there is no sane way to do this, like the i128 type in the<br class="">example.<br class=""><br class="">REPOSITORY<br class=""> rL LLVM<br class=""><br class=""><a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__reviews.llvm.org_D10260&d=AwMFAg&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=NvF_9ARzsAIpYrUvLmxxHToBfQN-rU535RSTEZugzYk&s=aoMTrDaG1k0Jxzd6bLKTqttLiuY5Npdhf9APQIsjs9s&e=" class="">http://reviews.llvm.org/D10260</a><br class=""><br class="">Files:<br class=""> lib/Target/X86/X86ISelLowering.cpp<br class=""> test/CodeGen/X86/asm-reject-reg-type-mismatch.ll<br class=""><br class="">Index: lib/Target/X86/X86ISelLowering.cpp<br class="">===================================================================<br class="">--- lib/Target/X86/X86ISelLowering.cpp<br class="">+++ lib/Target/X86/X86ISelLowering.cpp<br class="">@@ -25502,6 +25502,10 @@<br class=""> Res.first = DestReg;<br class=""> Res.second = &X86::GR64RegClass;<br class=""> }<br class="">+ } else if (VT != MVT::Other) {<br class="">+ // Abort if this was not for a clobber.<br class="">+ Res.first = 0;<br class="">+ Res.second = nullptr;<br class=""> }<br class=""> } else if (Res.second == &X86::FR32RegClass ||<br class=""> Res.second == &X86::FR64RegClass ||<br class="">@@ -25527,6 +25531,15 @@<br class=""> Res.second = &X86::VR256RegClass;<br class=""> else if (X86::VR512RegClass.hasType(VT))<br class=""> Res.second = &X86::VR512RegClass;<br class="">+ else if (VT != MVT::Other) {<br class="">+ // Abort if this was not for a clobber.<br class="">+ Res.first = 0;<br class="">+ Res.second = nullptr;<br class="">+ }<br class="">+ } else if (VT != MVT::Other) {<br class="">+ // Abort if this was not for a clobber.<br class="">+ Res.first = 0;<br class="">+ Res.second = nullptr;<br class=""> }<br class=""><br class=""> return Res;<br class="">Index: test/CodeGen/X86/asm-reject-reg-type-mismatch.ll<br class="">===================================================================<br class="">--- /dev/null<br class="">+++ test/CodeGen/X86/asm-reject-reg-type-mismatch.ll<br class="">@@ -0,0 +1,10 @@<br class="">+; RUN: not llc -no-integrated-as %s -o - 2> %t1<br class="">+; RUN: FileCheck %s < %t1<br class="">+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"<br class="">+target triple = "x86_64--"<br class="">+<br class="">+; CHECK: error: couldn't allocate output register for constraint '{ax}'<br class="">+define i128 @blup() {<br class="">+ %v = tail call i128 asm "", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i128 0)<br class="">+ ret i128 %v<br class="">+}<br class=""><br class="">EMAIL PREFERENCES<br class=""> http://reviews.llvm.org/settings/panel/emailpreferences/<br class=""><D10260.27157.patch><br class=""></blockquote><br class=""></div></blockquote></div><br class=""></body></html>