[PATCH] [NVPTX] kernel pointer arguments point to the global address space

[Jingyue Wu]

Yes. I'll add that to NVPTXPassConfig::addIRPass.

On Tue, Jun 2, 2015 at 5:45 AM, Justin Holewinski <
justin.holewinski at gmail.com> wrote:

> Comments inlined.
>
> Are you planning on enabling this pass by default?
>
>
> ================
> Comment at: lib/Target/NVPTX/NVPTXLowerKernelArgs.cpp:37
> @@ +36,3 @@
> +//      %input2 = bitcast float* %input to i8*
> +//      %cvt = call i8 addrspace(1)*
> @llvm.nvvm.ptr.gen.to.global.p1i8.p0i8(i8* %input2)
> +//      %input3 = bitcast i8 addrspace(1)* %cvt to float addrspace(1)*
> ----------------
> The address space conversion intrinsics are deprecated in favor of the new
> addrspacecast instruction (I need to document that in IntrinsicsNVVM.td).
>
> ================
> Comment at: lib/Target/NVPTX/NVPTXLowerKernelArgs.cpp:40
> @@ +39,3 @@
> +//      %input4 = addrspacecast float addrspace(1)* %input3 to float*
> +//      %v = load float, float* %input4, align 4
> +//      ...
> ----------------
> Isn't it possible that an optimization would remove all of these casts
> before NVVMFavorNonGenericAddrSpaces runs?  I know we control the pass
> pipeline in the backend, but I worry about these pass ordering constraints.
>
> ================
> Comment at: lib/Target/NVPTX/NVPTXLowerKernelArgs.cpp:189
> @@ +188,3 @@
> +      else
> +        handlePointerParam(&Arg);
> +    }
> ----------------
> Strictly speaking, this is only valid for CUDA (DrvInterface::CUDA).
>
> http://reviews.llvm.org/D10154
>
> EMAIL PREFERENCES
>   http://reviews.llvm.org/settings/panel/emailpreferences/
>
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150602/db3eb4aa/attachment.html>