[PATCH] [NVPTX] kernel pointer arguments point to the global address space

Justin Holewinski justin.holewinski at gmail.com
Tue Jun 2 05:45:54 PDT 2015


Comments inlined.

Are you planning on enabling this pass by default?


================
Comment at: lib/Target/NVPTX/NVPTXLowerKernelArgs.cpp:37
@@ +36,3 @@
+//      %input2 = bitcast float* %input to i8*
+//      %cvt = call i8 addrspace(1)* @llvm.nvvm.ptr.gen.to.global.p1i8.p0i8(i8* %input2)
+//      %input3 = bitcast i8 addrspace(1)* %cvt to float addrspace(1)*
----------------
The address space conversion intrinsics are deprecated in favor of the new addrspacecast instruction (I need to document that in IntrinsicsNVVM.td).

================
Comment at: lib/Target/NVPTX/NVPTXLowerKernelArgs.cpp:40
@@ +39,3 @@
+//      %input4 = addrspacecast float addrspace(1)* %input3 to float*
+//      %v = load float, float* %input4, align 4
+//      ...
----------------
Isn't it possible that an optimization would remove all of these casts before NVVMFavorNonGenericAddrSpaces runs?  I know we control the pass pipeline in the backend, but I worry about these pass ordering constraints.

================
Comment at: lib/Target/NVPTX/NVPTXLowerKernelArgs.cpp:189
@@ +188,3 @@
+      else
+        handlePointerParam(&Arg);
+    }
----------------
Strictly speaking, this is only valid for CUDA (DrvInterface::CUDA).

http://reviews.llvm.org/D10154

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