[PATCH] [X86][SSE] Vectorized i8 and i16 shift operators

[Simon Pilgrim]

Thanks Elena, I'll get a fix for the AVX2 shifts done but can you explain the PSRAD approach please?


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================
Comment at: test/CodeGen/X86/avx2-vector-shifts.ll:274
@@ +273,3 @@
+
+define <16 x i16> @shl_16i16(<16 x i16> %r, <16 x i16> %a) nounwind {
+; CHECK-LABEL:  shl_16i16
----------------
delena wrote:
> You can extend to 2 vectors of <8 x i32> and use variable shift left VPSLLVD.
No problem - I'll adapt the existing 8i16 AVX2 shift code.

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Comment at: test/CodeGen/X86/vec_shift8.ll:201
@@ +200,3 @@
+;
+; SSE41:      movdqa    %xmm0, %xmm2
+; SSE41-NEXT: movdqa    %xmm1, %xmm0
----------------
delena wrote:
> extend to 2 vectors of <4 x i32> and use PSRAD instruction
Can you explain this? I'm not sure what PSRAD will give us.

http://reviews.llvm.org/D9474

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