[llvm] r237079 - Migrate existing backends that care about software floating point
Eric Christopher
echristo at gmail.com
Wed May 13 16:48:05 PDT 2015
Not really. There's no way to autoupgrade depending on target and since we
_always_ emitted the use-soft-float attribute, even on targets that don't
support it, we'd need to have a) every target support +soft-float or b)
turn off the warning for unsupported subtarget features if that one
happened to be +soft-float.
-eric
On Wed, May 13, 2015 at 4:34 PM Akira Hatanaka <ahatanak at gmail.com> wrote:
> I wonder if adding a function which upgrades an old IR would simplify the
> backend a little. Currently, getSubtargetImp adds "+soft-float" to
> target-features if there is function attribute "use-soft-float"="true", but
> that piece of code can be removed if it's done in autoupgrade.
>
> On Wed, May 13, 2015 at 1:59 PM, Eric Christopher <echristo at gmail.com>
> wrote:
>
>> Yep, next on my list. I hadn't just because I wanted to get the existing
>> format down in a way that we can deal with and see if there's a need for
>> additional command line options etc. The backends can adapt to the changed
>> and existing codegen, etc right now and I don't think there's any
>> additional need for command line options, or upgrading the IR to a new
>> format.
>>
>> -eric
>>
>>
>> On Tue, May 12, 2015 at 11:04 AM Akira Hatanaka <ahatanak at gmail.com>
>> wrote:
>>
>>> Is clang going to stop emitting attribute "use-soft-float" now that
>>> "+soft-float" is embedded in the feature string?
>>>
>>> On Mon, May 11, 2015 at 6:26 PM, Eric Christopher <echristo at gmail.com>
>>> wrote:
>>>
>>>> Author: echristo
>>>> Date: Mon May 11 20:26:05 2015
>>>> New Revision: 237079
>>>>
>>>> URL: http://llvm.org/viewvc/llvm-project?rev=237079&view=rev
>>>> Log:
>>>> Migrate existing backends that care about software floating point
>>>> to use the information in the module rather than TargetOptions.
>>>>
>>>> We've had and clang has used the use-soft-float attribute for some
>>>> time now so have the backends set a subtarget feature based on
>>>> a particular function now that subtargets are created based on
>>>> functions and function attributes.
>>>>
>>>> For the one middle end soft float check go ahead and create
>>>> an overloadable TargetLowering::useSoftFloat function that
>>>> just checks the TargetSubtargetInfo in all cases.
>>>>
>>>> Also remove the command line option that hard codes whether or
>>>> not soft-float is set by using the attribute for all of the
>>>> target specific test cases - for the generic just go ahead and
>>>> add the attribute in the one case that showed up.
>>>>
>>>> Modified:
>>>> llvm/trunk/include/llvm/CodeGen/CommandFlags.h
>>>> llvm/trunk/include/llvm/Target/TargetLowering.h
>>>> llvm/trunk/include/llvm/Target/TargetOptions.h
>>>> llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>>>> llvm/trunk/lib/Target/ARM/ARM.td
>>>> llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>>>> llvm/trunk/lib/Target/ARM/ARMISelLowering.h
>>>> llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
>>>> llvm/trunk/lib/Target/ARM/ARMSubtarget.h
>>>> llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
>>>> llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
>>>> llvm/trunk/lib/Target/Mips/MipsISelLowering.h
>>>> llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
>>>> llvm/trunk/lib/Target/TargetMachine.cpp
>>>> llvm/trunk/lib/Target/X86/X86.td
>>>> llvm/trunk/lib/Target/X86/X86FastISel.cpp
>>>> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>>>> llvm/trunk/lib/Target/X86/X86ISelLowering.h
>>>> llvm/trunk/lib/Target/X86/X86Subtarget.cpp
>>>> llvm/trunk/lib/Target/X86/X86Subtarget.h
>>>> llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
>>>> llvm/trunk/test/CodeGen/ARM/vfp-libcalls.ll
>>>> llvm/trunk/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
>>>> llvm/trunk/test/CodeGen/X86/cvt16.ll
>>>> llvm/trunk/test/CodeGen/X86/floor-soft-float.ll
>>>> llvm/trunk/test/CodeGen/X86/soft-fp.ll
>>>> llvm/trunk/tools/llc/llc.cpp
>>>> llvm/trunk/tools/lli/lli.cpp
>>>>
>>>> Modified: llvm/trunk/include/llvm/CodeGen/CommandFlags.h
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/CommandFlags.h?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/include/llvm/CodeGen/CommandFlags.h (original)
>>>> +++ llvm/trunk/include/llvm/CodeGen/CommandFlags.h Mon May 11 20:26:05
>>>> 2015
>>>> @@ -126,11 +126,6 @@ EnableHonorSignDependentRoundingFPMath("
>>>> cl::desc("Force codegen to assume rounding mode can change
>>>> dynamically"),
>>>> cl::init(false));
>>>>
>>>> -cl::opt<bool>
>>>> -GenerateSoftFloatCalls("soft-float",
>>>> - cl::desc("Generate software floating point library
>>>> calls"),
>>>> - cl::init(false));
>>>> -
>>>> cl::opt<llvm::FloatABI::ABIType>
>>>> FloatABIForCalls("float-abi",
>>>> cl::desc("Choose float ABI type"),
>>>> @@ -241,7 +236,6 @@ static inline TargetOptions InitTargetOp
>>>> Options.NoNaNsFPMath = EnableNoNaNsFPMath;
>>>> Options.HonorSignDependentRoundingFPMathOption =
>>>> EnableHonorSignDependentRoundingFPMath;
>>>> - Options.UseSoftFloat = GenerateSoftFloatCalls;
>>>> if (FloatABIForCalls != FloatABI::Default)
>>>> Options.FloatABIType = FloatABIForCalls;
>>>> Options.NoZerosInBSS = DontPlaceZerosInBSS;
>>>>
>>>> Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
>>>> +++ llvm/trunk/include/llvm/Target/TargetLowering.h Mon May 11 20:26:05
>>>> 2015
>>>> @@ -165,6 +165,7 @@ public:
>>>>
>>>> bool isBigEndian() const { return !IsLittleEndian; }
>>>> bool isLittleEndian() const { return IsLittleEndian; }
>>>> + virtual bool useSoftFloat() const { return false; }
>>>>
>>>> /// Return the pointer type for the given address space, defaults to
>>>> /// the pointer type from the data layout.
>>>>
>>>> Modified: llvm/trunk/include/llvm/Target/TargetOptions.h
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOptions.h?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/include/llvm/Target/TargetOptions.h (original)
>>>> +++ llvm/trunk/include/llvm/Target/TargetOptions.h Mon May 11 20:26:05
>>>> 2015
>>>> @@ -63,7 +63,7 @@ namespace llvm {
>>>> : PrintMachineCode(false), NoFramePointerElim(false),
>>>> LessPreciseFPMADOption(false), UnsafeFPMath(false),
>>>> NoInfsFPMath(false), NoNaNsFPMath(false),
>>>> - HonorSignDependentRoundingFPMathOption(false),
>>>> UseSoftFloat(false),
>>>> + HonorSignDependentRoundingFPMathOption(false),
>>>> NoZerosInBSS(false),
>>>> GuaranteedTailCallOpt(false),
>>>> DisableTailCalls(false), StackAlignmentOverride(0),
>>>> @@ -127,12 +127,6 @@ namespace llvm {
>>>> unsigned HonorSignDependentRoundingFPMathOption : 1;
>>>> bool HonorSignDependentRoundingFPMath() const;
>>>>
>>>> - /// UseSoftFloat - This flag is enabled when the -soft-float flag
>>>> is
>>>> - /// specified on the command line. When this flag is on, the code
>>>> generator
>>>> - /// will generate libcalls to the software floating point library
>>>> instead of
>>>> - /// target FP instructions.
>>>> - unsigned UseSoftFloat : 1;
>>>> -
>>>> /// NoZerosInBSS - By default some codegens place zero-initialized
>>>> data to
>>>> /// .bss section. This flag disables such behaviour (necessary,
>>>> e.g. for
>>>> /// crt*.o compiling).
>>>> @@ -240,7 +234,6 @@ inline bool operator==(const TargetOptio
>>>> ARE_EQUAL(NoInfsFPMath) &&
>>>> ARE_EQUAL(NoNaNsFPMath) &&
>>>> ARE_EQUAL(HonorSignDependentRoundingFPMathOption) &&
>>>> - ARE_EQUAL(UseSoftFloat) &&
>>>> ARE_EQUAL(NoZerosInBSS) &&
>>>> ARE_EQUAL(GuaranteedTailCallOpt) &&
>>>> ARE_EQUAL(DisableTailCalls) &&
>>>>
>>>> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
>>>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon May 11
>>>> 20:26:05 2015
>>>> @@ -3456,7 +3456,7 @@ void SelectionDAGLegalize::ExpandNode(SD
>>>> break;
>>>> }
>>>> case ISD::FP_TO_FP16: {
>>>> - if (!TM.Options.UseSoftFloat && TM.Options.UnsafeFPMath) {
>>>> + if (!TLI.useSoftFloat() && TM.Options.UnsafeFPMath) {
>>>> SDValue Op = Node->getOperand(0);
>>>> MVT SVT = Op.getSimpleValueType();
>>>> if ((SVT == MVT::f64 || SVT == MVT::f80) &&
>>>>
>>>> Modified: llvm/trunk/lib/Target/ARM/ARM.td
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/ARM/ARM.td (original)
>>>> +++ llvm/trunk/lib/Target/ARM/ARM.td Mon May 11 20:26:05 2015
>>>> @@ -23,6 +23,9 @@ include "llvm/Target/Target.td"
>>>> def ModeThumb : SubtargetFeature<"thumb-mode", "InThumbMode", "true",
>>>> "Thumb mode">;
>>>>
>>>> +def ModeSoftFloat : SubtargetFeature<"soft-float", "UseSoftFloat",
>>>> "true",
>>>> + "Use software floating point
>>>> features.">;
>>>> +
>>>>
>>>> //===----------------------------------------------------------------------===//
>>>> // ARM Subtarget features.
>>>> //
>>>>
>>>> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
>>>> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon May 11 20:26:05
>>>> 2015
>>>> @@ -170,7 +170,7 @@ ARMTargetLowering::ARMTargetLowering(con
>>>> if (Subtarget->isTargetMachO()) {
>>>> // Uses VFP for Thumb libfuncs if available.
>>>> if (Subtarget->isThumb() && Subtarget->hasVFP2() &&
>>>> - Subtarget->hasARMOps() && !TM.Options.UseSoftFloat) {
>>>> + Subtarget->hasARMOps() && !Subtarget->useSoftFloat()) {
>>>> // Single-precision floating-point arithmetic.
>>>> setLibcallName(RTLIB::ADD_F32, "__addsf3vfp");
>>>> setLibcallName(RTLIB::SUB_F32, "__subsf3vfp");
>>>> @@ -401,7 +401,7 @@ ARMTargetLowering::ARMTargetLowering(con
>>>> addRegisterClass(MVT::i32, &ARM::tGPRRegClass);
>>>> else
>>>> addRegisterClass(MVT::i32, &ARM::GPRRegClass);
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasVFP2() &&
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasVFP2() &&
>>>> !Subtarget->isThumb1Only()) {
>>>> addRegisterClass(MVT::f32, &ARM::SPRRegClass);
>>>> addRegisterClass(MVT::f64, &ARM::DPRRegClass);
>>>> @@ -820,7 +820,7 @@ ARMTargetLowering::ARMTargetLowering(con
>>>> }
>>>> setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
>>>>
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasVFP2() &&
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasVFP2() &&
>>>> !Subtarget->isThumb1Only()) {
>>>> // Turn f64->i64 into VMOVRRD, i64 -> f64 to VMOVDRR
>>>> // iff target supports vfp2.
>>>> @@ -861,7 +861,7 @@ ARMTargetLowering::ARMTargetLowering(con
>>>> setOperationAction(ISD::FSINCOS, MVT::f32, Expand);
>>>> setOperationAction(ISD::FREM, MVT::f64, Expand);
>>>> setOperationAction(ISD::FREM, MVT::f32, Expand);
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasVFP2() &&
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasVFP2() &&
>>>> !Subtarget->isThumb1Only()) {
>>>> setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
>>>> setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
>>>> @@ -875,7 +875,7 @@ ARMTargetLowering::ARMTargetLowering(con
>>>> }
>>>>
>>>> // Various VFP goodness
>>>> - if (!TM.Options.UseSoftFloat && !Subtarget->isThumb1Only()) {
>>>> + if (!Subtarget->useSoftFloat() && !Subtarget->isThumb1Only()) {
>>>> // FP-ARMv8 adds f64 <-> f16 conversion. Before that it should be
>>>> expanded.
>>>> if (!Subtarget->hasFPARMv8() || Subtarget->isFPOnlySP()) {
>>>> setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
>>>> @@ -932,7 +932,7 @@ ARMTargetLowering::ARMTargetLowering(con
>>>>
>>>> setStackPointerRegisterToSaveRestore(ARM::SP);
>>>>
>>>> - if (TM.Options.UseSoftFloat || Subtarget->isThumb1Only() ||
>>>> + if (Subtarget->useSoftFloat() || Subtarget->isThumb1Only() ||
>>>> !Subtarget->hasVFP2())
>>>> setSchedulingPreference(Sched::RegPressure);
>>>> else
>>>> @@ -956,6 +956,10 @@ ARMTargetLowering::ARMTargetLowering(con
>>>> setMinFunctionAlignment(Subtarget->isThumb() ? 1 : 2);
>>>> }
>>>>
>>>> +bool ARMTargetLowering::useSoftFloat() const {
>>>> + return Subtarget->useSoftFloat();
>>>> +}
>>>> +
>>>> // FIXME: It might make sense to define the representative register
>>>> class as the
>>>> // nearest super-register that has a non-null superset. For example,
>>>> DPR_VFP2 is
>>>> // a super-register of SPR, and DPR is a superset if DPR_VFP2.
>>>> Consequently,
>>>>
>>>> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.h
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.h?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.h (original)
>>>> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.h Mon May 11 20:26:05 2015
>>>> @@ -231,6 +231,7 @@ namespace llvm {
>>>> const ARMSubtarget &STI);
>>>>
>>>> unsigned getJumpTableEncoding() const override;
>>>> + bool useSoftFloat() const override;
>>>>
>>>> SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const
>>>> override;
>>>>
>>>>
>>>> Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
>>>> +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Mon May 11 20:26:05 2015
>>>> @@ -145,6 +145,7 @@ void ARMSubtarget::initializeEnvironment
>>>> HasVMLxForwarding = false;
>>>> SlowFPBrcc = false;
>>>> InThumbMode = false;
>>>> + UseSoftFloat = false;
>>>> HasThumb2 = false;
>>>> NoARM = false;
>>>> IsR9Reserved = ReserveR9;
>>>>
>>>> Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
>>>> +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Mon May 11 20:26:05 2015
>>>> @@ -100,6 +100,9 @@ protected:
>>>> /// InThumbMode - True if compiling for Thumb, false for ARM.
>>>> bool InThumbMode;
>>>>
>>>> + /// UseSoftFloat - True if we're using software floating point
>>>> features.
>>>> + bool UseSoftFloat;
>>>> +
>>>> /// HasThumb2 - True if Thumb2 instructions are supported.
>>>> bool HasThumb2;
>>>>
>>>> @@ -393,6 +396,7 @@ public:
>>>> bool isAPCS_ABI() const;
>>>> bool isAAPCS_ABI() const;
>>>>
>>>> + bool useSoftFloat() const { return UseSoftFloat; }
>>>> bool isThumb() const { return InThumbMode; }
>>>> bool isThumb1Only() const { return InThumbMode && !HasThumb2; }
>>>> bool isThumb2() const { return InThumbMode && HasThumb2; }
>>>>
>>>> Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
>>>> +++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Mon May 11 20:26:05
>>>> 2015
>>>> @@ -207,13 +207,15 @@ ARMBaseTargetMachine::getSubtargetImpl(c
>>>> // function before we can generate a subtarget. We also need to use
>>>> // it as a key for the subtarget since that can be the only
>>>> difference
>>>> // between two functions.
>>>> - Attribute SFAttr = F.getFnAttribute("use-soft-float");
>>>> - bool SoftFloat = !SFAttr.hasAttribute(Attribute::None)
>>>> - ? SFAttr.getValueAsString() == "true"
>>>> - : Options.UseSoftFloat;
>>>> + bool SoftFloat =
>>>> + F.hasFnAttribute("use-soft-float") &&
>>>> + F.getFnAttribute("use-soft-float").getValueAsString() == "true";
>>>> + // If the soft float attribute is set on the function turn on the
>>>> soft float
>>>> + // subtarget feature.
>>>> + if (SoftFloat)
>>>> + FS += FS.empty() ? "+soft-float" : ",+soft-float";
>>>>
>>>> - auto &I = SubtargetMap[CPU + FS + (SoftFloat ? "use-soft-float=true"
>>>> - :
>>>> "use-soft-float=false")];
>>>> + auto &I = SubtargetMap[CPU + FS];
>>>> if (!I) {
>>>> // This needs to be done before we create a new subtarget since any
>>>> // creation will depend on the TM and the code generation flags on
>>>> the
>>>>
>>>> Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
>>>> +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon May 11 20:26:05
>>>> 2015
>>>> @@ -3598,6 +3598,10 @@ unsigned MipsTargetLowering::getJumpTabl
>>>> return TargetLowering::getJumpTableEncoding();
>>>> }
>>>>
>>>> +bool MipsTargetLowering::useSoftFloat() const {
>>>> + return Subtarget.useSoftFloat();
>>>> +}
>>>> +
>>>> void MipsTargetLowering::copyByValRegs(
>>>> SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains,
>>>> SelectionDAG &DAG,
>>>> const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals,
>>>>
>>>> Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original)
>>>> +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Mon May 11 20:26:05
>>>> 2015
>>>> @@ -530,6 +530,7 @@ namespace llvm {
>>>> bool isFPImmLegal(const APFloat &Imm, EVT VT) const override;
>>>>
>>>> unsigned getJumpTableEncoding() const override;
>>>> + bool useSoftFloat() const override;
>>>>
>>>> /// Emit a sign-extension using sll/sra, seb, or seh appropriately.
>>>> MachineBasicBlock *emitSignExtendToI32InReg(MachineInstr *MI,
>>>>
>>>> Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)
>>>> +++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Mon May 11
>>>> 20:26:05 2015
>>>> @@ -140,10 +140,9 @@ MipsTargetMachine::getSubtargetImpl(cons
>>>> // FIXME: This is related to the code below to reset the target
>>>> options,
>>>> // we need to know whether or not the soft float flag is set on the
>>>> // function, so we can enable it as a subtarget feature.
>>>> - Attribute SFAttr = F.getFnAttribute("use-soft-float");
>>>> - bool softFloat = !SFAttr.hasAttribute(Attribute::None)
>>>> - ? SFAttr.getValueAsString() == "true"
>>>> - : Options.UseSoftFloat;
>>>> + bool softFloat =
>>>> + F.hasFnAttribute("use-soft-float") &&
>>>> + F.getFnAttribute("use-soft-float").getValueAsString() == "true";
>>>>
>>>> if (hasMips16Attr)
>>>> FS += FS.empty() ? "+mips16" : ",+mips16";
>>>>
>>>> Modified: llvm/trunk/lib/Target/TargetMachine.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/TargetMachine.cpp (original)
>>>> +++ llvm/trunk/lib/Target/TargetMachine.cpp Mon May 11 20:26:05 2015
>>>> @@ -71,7 +71,6 @@ void TargetMachine::resetTargetOptions(c
>>>> RESET_OPTION(UnsafeFPMath, "unsafe-fp-math");
>>>> RESET_OPTION(NoInfsFPMath, "no-infs-fp-math");
>>>> RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math");
>>>> - RESET_OPTION(UseSoftFloat, "use-soft-float");
>>>> RESET_OPTION(DisableTailCalls, "disable-tail-calls");
>>>>
>>>> Options.MCOptions.SanitizeAddress =
>>>> F.hasFnAttribute(Attribute::SanitizeAddress);
>>>>
>>>> Modified: llvm/trunk/lib/Target/X86/X86.td
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/X86/X86.td (original)
>>>> +++ llvm/trunk/lib/Target/X86/X86.td Mon May 11 20:26:05 2015
>>>> @@ -192,6 +192,9 @@ def FeatureUseSqrtEst : SubtargetFeature
>>>> "Use RSQRT* to optimize square root
>>>> calculations">;
>>>> def FeatureUseRecipEst : SubtargetFeature<"use-recip-est",
>>>> "UseReciprocalEst",
>>>> "true", "Use RCP* to optimize division
>>>> calculations">;
>>>> +def FeatureSoftFloat
>>>> + : SubtargetFeature<"soft-float", "UseSoftFloat", "true",
>>>> + "Use software floating point features.">;
>>>>
>>>>
>>>> //===----------------------------------------------------------------------===//
>>>> // X86 processors supported.
>>>>
>>>> Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
>>>> +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Mon May 11 20:26:05 2015
>>>> @@ -2254,7 +2254,7 @@ bool X86FastISel::fastLowerIntrinsicCall
>>>> default: return false;
>>>> case Intrinsic::convert_from_fp16:
>>>> case Intrinsic::convert_to_fp16: {
>>>> - if (TM.Options.UseSoftFloat || !Subtarget->hasF16C())
>>>> + if (Subtarget->useSoftFloat() || !Subtarget->hasF16C())
>>>> return false;
>>>>
>>>> const Value *Op = II->getArgOperand(0);
>>>>
>>>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
>>>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon May 11 20:26:05
>>>> 2015
>>>> @@ -183,7 +183,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> if (Subtarget->is64Bit()) {
>>>> setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote);
>>>> setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom);
>>>> - } else if (!TM.Options.UseSoftFloat) {
>>>> + } else if (!Subtarget->useSoftFloat()) {
>>>> // We have an algorithm for SSE2->double, and we turn this into a
>>>> // 64-bit FILD followed by conditional FADD for other targets.
>>>> setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom);
>>>> @@ -197,7 +197,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> setOperationAction(ISD::SINT_TO_FP , MVT::i1 , Promote);
>>>> setOperationAction(ISD::SINT_TO_FP , MVT::i8 , Promote);
>>>>
>>>> - if (!TM.Options.UseSoftFloat) {
>>>> + if (!Subtarget->useSoftFloat()) {
>>>> // SSE has no i16 to fp conversion, only i32
>>>> if (X86ScalarSSEf32) {
>>>> setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Promote);
>>>> @@ -240,7 +240,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> if (Subtarget->is64Bit()) {
>>>> setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Expand);
>>>> setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote);
>>>> - } else if (!TM.Options.UseSoftFloat) {
>>>> + } else if (!Subtarget->useSoftFloat()) {
>>>> // Since AVX is a superset of SSE3, only check for SSE here.
>>>> if (Subtarget->hasSSE1() && !Subtarget->hasSSE3())
>>>> // Expand FP_TO_UINT into a select.
>>>> @@ -368,7 +368,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> // Special handling for half-precision floating point conversions.
>>>> // If we don't have F16C support, then lower half float conversions
>>>> // into library calls.
>>>> - if (TM.Options.UseSoftFloat || !Subtarget->hasF16C()) {
>>>> + if (Subtarget->useSoftFloat() || !Subtarget->hasF16C()) {
>>>> setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
>>>> setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);
>>>> }
>>>> @@ -517,7 +517,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> setOperationAction(ISD::GC_TRANSITION_START, MVT::Other, Custom);
>>>> setOperationAction(ISD::GC_TRANSITION_END, MVT::Other, Custom);
>>>>
>>>> - if (!TM.Options.UseSoftFloat && X86ScalarSSEf64) {
>>>> + if (!Subtarget->useSoftFloat() && X86ScalarSSEf64) {
>>>> // f32 and f64 use SSE.
>>>> // Set up the FP register classes.
>>>> addRegisterClass(MVT::f32, &X86::FR32RegClass);
>>>> @@ -551,7 +551,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> // cases we handle.
>>>> addLegalFPImmediate(APFloat(+0.0)); // xorpd
>>>> addLegalFPImmediate(APFloat(+0.0f)); // xorps
>>>> - } else if (!TM.Options.UseSoftFloat && X86ScalarSSEf32) {
>>>> + } else if (!Subtarget->useSoftFloat() && X86ScalarSSEf32) {
>>>> // Use SSE for f32, x87 for f64.
>>>> // Set up the FP register classes.
>>>> addRegisterClass(MVT::f32, &X86::FR32RegClass);
>>>> @@ -586,7 +586,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> setOperationAction(ISD::FCOS , MVT::f64, Expand);
>>>> setOperationAction(ISD::FSINCOS, MVT::f64, Expand);
>>>> }
>>>> - } else if (!TM.Options.UseSoftFloat) {
>>>> + } else if (!Subtarget->useSoftFloat()) {
>>>> // f32 and f64 in x87.
>>>> // Set up the FP register classes.
>>>> addRegisterClass(MVT::f64, &X86::RFP64RegClass);
>>>> @@ -620,7 +620,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> setOperationAction(ISD::FMA, MVT::f32, Expand);
>>>>
>>>> // Long double always uses X87.
>>>> - if (!TM.Options.UseSoftFloat) {
>>>> + if (!Subtarget->useSoftFloat()) {
>>>> addRegisterClass(MVT::f80, &X86::RFP80RegClass);
>>>> setOperationAction(ISD::UNDEF, MVT::f80, Expand);
>>>> setOperationAction(ISD::FCOPYSIGN, MVT::f80, Expand);
>>>> @@ -760,7 +760,7 @@ X86TargetLowering::X86TargetLowering(con
>>>>
>>>> // FIXME: In order to prevent SSE instructions being expanded to MMX
>>>> ones
>>>> // with -msoft-float, disable use of MMX as well.
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasMMX()) {
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasMMX()) {
>>>> addRegisterClass(MVT::x86mmx, &X86::VR64RegClass);
>>>> // No operations on x86mmx supported, everything uses intrinsics.
>>>> }
>>>> @@ -778,7 +778,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> }
>>>> setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v1i64, Expand);
>>>>
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasSSE1()) {
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasSSE1()) {
>>>> addRegisterClass(MVT::v4f32, &X86::VR128RegClass);
>>>>
>>>> setOperationAction(ISD::FADD, MVT::v4f32, Legal);
>>>> @@ -797,7 +797,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Custom);
>>>> }
>>>>
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasSSE2()) {
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasSSE2()) {
>>>> addRegisterClass(MVT::v2f64, &X86::VR128RegClass);
>>>>
>>>> // FIXME: Unfortunately, -soft-float and -no-implicit-float mean
>>>> XMM
>>>> @@ -942,7 +942,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> setOperationAction(ISD::BITCAST, MVT::v8i8, Custom);
>>>> }
>>>>
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasSSE41()) {
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasSSE41()) {
>>>> for (MVT RoundedTy : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64})
>>>> {
>>>> setOperationAction(ISD::FFLOOR, RoundedTy, Legal);
>>>> setOperationAction(ISD::FCEIL, RoundedTy, Legal);
>>>> @@ -1024,7 +1024,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> setOperationAction(ISD::SRA, MVT::v4i32, Custom);
>>>> }
>>>>
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasFp256()) {
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasFp256()) {
>>>> addRegisterClass(MVT::v32i8, &X86::VR256RegClass);
>>>> addRegisterClass(MVT::v16i16, &X86::VR256RegClass);
>>>> addRegisterClass(MVT::v8i32, &X86::VR256RegClass);
>>>> @@ -1244,7 +1244,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> }
>>>> }
>>>>
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasAVX512()) {
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasAVX512()) {
>>>> addRegisterClass(MVT::v16i32, &X86::VR512RegClass);
>>>> addRegisterClass(MVT::v16f32, &X86::VR512RegClass);
>>>> addRegisterClass(MVT::v8i64, &X86::VR512RegClass);
>>>> @@ -1447,7 +1447,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> }
>>>> }// has AVX-512
>>>>
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasBWI()) {
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasBWI()) {
>>>> addRegisterClass(MVT::v32i16, &X86::VR512RegClass);
>>>> addRegisterClass(MVT::v64i8, &X86::VR512RegClass);
>>>>
>>>> @@ -1484,7 +1484,7 @@ X86TargetLowering::X86TargetLowering(con
>>>> }
>>>> }
>>>>
>>>> - if (!TM.Options.UseSoftFloat && Subtarget->hasVLX()) {
>>>> + if (!Subtarget->useSoftFloat() && Subtarget->hasVLX()) {
>>>> addRegisterClass(MVT::v4i1, &X86::VK4RegClass);
>>>> addRegisterClass(MVT::v2i1, &X86::VK2RegClass);
>>>>
>>>> @@ -1789,6 +1789,10 @@ unsigned X86TargetLowering::getJumpTable
>>>> return TargetLowering::getJumpTableEncoding();
>>>> }
>>>>
>>>> +bool X86TargetLowering::useSoftFloat() const {
>>>> + return Subtarget->useSoftFloat();
>>>> +}
>>>> +
>>>> const MCExpr *
>>>> X86TargetLowering::LowerCustomJumpTableEntry(const
>>>> MachineJumpTableInfo *MJTI,
>>>> const MachineBasicBlock
>>>> *MBB,
>>>> @@ -2294,7 +2298,7 @@ static ArrayRef<MCPhysReg> get64BitArgum
>>>>
>>>> const Function *Fn = MF.getFunction();
>>>> bool NoImplicitFloatOps =
>>>> Fn->hasFnAttribute(Attribute::NoImplicitFloat);
>>>> - bool isSoftFloat = MF.getTarget().Options.UseSoftFloat;
>>>> + bool isSoftFloat = Subtarget->useSoftFloat();
>>>> assert(!(isSoftFloat && NoImplicitFloatOps) &&
>>>> "SSE register cannot be used when SSE is disabled!");
>>>> if (isSoftFloat || NoImplicitFloatOps || !Subtarget->hasSSE1())
>>>> @@ -2468,7 +2472,7 @@ X86TargetLowering::LowerFormalArguments(
>>>> bool IsWinEHParent = WinEHParent && WinEHParent == Fn;
>>>>
>>>> // Figure out if XMM registers are in use.
>>>> - assert(!(MF.getTarget().Options.UseSoftFloat &&
>>>> + assert(!(Subtarget->useSoftFloat() &&
>>>> Fn->hasFnAttribute(Attribute::NoImplicitFloat)) &&
>>>> "SSE register cannot be used when SSE is disabled!");
>>>>
>>>> @@ -14600,7 +14604,7 @@ SDValue X86TargetLowering::LowerVAARG(SD
>>>>
>>>> if (ArgMode == 2) {
>>>> // Sanity Check: Make sure using fp_offset makes sense.
>>>> - assert(!DAG.getTarget().Options.UseSoftFloat &&
>>>> + assert(!Subtarget->useSoftFloat() &&
>>>> !(DAG.getMachineFunction().getFunction()->hasFnAttribute(
>>>> Attribute::NoImplicitFloat)) &&
>>>> Subtarget->hasSSE1());
>>>> @@ -23203,8 +23207,8 @@ static SDValue PerformSTORECombine(SDNod
>>>>
>>>> const Function *F = DAG.getMachineFunction().getFunction();
>>>> bool NoImplicitFloatOps =
>>>> F->hasFnAttribute(Attribute::NoImplicitFloat);
>>>> - bool F64IsLegal = !DAG.getTarget().Options.UseSoftFloat &&
>>>> !NoImplicitFloatOps
>>>> - && Subtarget->hasSSE2();
>>>> + bool F64IsLegal =
>>>> + !Subtarget->useSoftFloat() && !NoImplicitFloatOps &&
>>>> Subtarget->hasSSE2();
>>>> if ((VT.isVector() ||
>>>> (VT == MVT::i64 && F64IsLegal && !Subtarget->is64Bit())) &&
>>>> isa<LoadSDNode>(St->getValue()) &&
>>>>
>>>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
>>>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Mon May 11 20:26:05 2015
>>>> @@ -572,6 +572,7 @@ namespace llvm {
>>>> const X86Subtarget &STI);
>>>>
>>>> unsigned getJumpTableEncoding() const override;
>>>> + bool useSoftFloat() const override;
>>>>
>>>> MVT getScalarShiftAmountTy(EVT LHSTy) const override { return
>>>> MVT::i8; }
>>>>
>>>>
>>>> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
>>>> +++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Mon May 11 20:26:05 2015
>>>> @@ -278,6 +278,7 @@ void X86Subtarget::initializeEnvironment
>>>> stackAlignment = 4;
>>>> // FIXME: this is a known good value for Yonah. How about others?
>>>> MaxInlineSizeThreshold = 128;
>>>> + UseSoftFloat = false;
>>>> }
>>>>
>>>> X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef
>>>> CPU,
>>>>
>>>> Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
>>>> +++ llvm/trunk/lib/Target/X86/X86Subtarget.h Mon May 11 20:26:05 2015
>>>> @@ -218,6 +218,9 @@ protected:
>>>> /// Processor has AVX-512 Vector Length eXtenstions
>>>> bool HasVLX;
>>>>
>>>> + /// Use software floating point for code generation.
>>>> + bool UseSoftFloat;
>>>> +
>>>> /// The minimum alignment known to hold of the stack frame on
>>>> /// entry to the function and which must be maintained by every
>>>> function.
>>>> unsigned stackAlignment;
>>>> @@ -385,6 +388,7 @@ public:
>>>>
>>>> bool isAtom() const { return X86ProcFamily == IntelAtom; }
>>>> bool isSLM() const { return X86ProcFamily == IntelSLM; }
>>>> + bool useSoftFloat() const { return UseSoftFloat; }
>>>>
>>>> const Triple &getTargetTriple() const { return TargetTriple; }
>>>>
>>>>
>>>> Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
>>>> +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon May 11 20:26:05
>>>> 2015
>>>> @@ -131,13 +131,15 @@ X86TargetMachine::getSubtargetImpl(const
>>>> // function before we can generate a subtarget. We also need to use
>>>> // it as a key for the subtarget since that can be the only
>>>> difference
>>>> // between two functions.
>>>> - Attribute SFAttr = F.getFnAttribute("use-soft-float");
>>>> - bool SoftFloat = !SFAttr.hasAttribute(Attribute::None)
>>>> - ? SFAttr.getValueAsString() == "true"
>>>> - : Options.UseSoftFloat;
>>>> + bool SoftFloat =
>>>> + F.hasFnAttribute("use-soft-float") &&
>>>> + F.getFnAttribute("use-soft-float").getValueAsString() == "true";
>>>> + // If the soft float attribute is set on the function turn on the
>>>> soft float
>>>> + // subtarget feature.
>>>> + if (SoftFloat)
>>>> + FS += FS.empty() ? "+soft-float" : ",+soft-float";
>>>>
>>>> - auto &I = SubtargetMap[CPU + FS + (SoftFloat ? "use-soft-float=true"
>>>> - :
>>>> "use-soft-float=false")];
>>>> + auto &I = SubtargetMap[CPU + FS];
>>>> if (!I) {
>>>> // This needs to be done before we create a new subtarget since any
>>>> // creation will depend on the TM and the code generation flags on
>>>> the
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/ARM/vfp-libcalls.ll
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vfp-libcalls.ll?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/ARM/vfp-libcalls.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/ARM/vfp-libcalls.ll Mon May 11 20:26:05 2015
>>>> @@ -1,6 +1,6 @@
>>>> ; RUN: llc -mtriple=armv6-apple-ios -mcpu=arm1136jf-s -o - %s |
>>>> FileCheck %s --check-prefix=CHECK-HARD
>>>> ; RUN: llc -mtriple=thumbv6-apple-ios -mcpu=arm1136jf-s -o - %s |
>>>> FileCheck %s --check-prefix=CHECK-SOFTISH
>>>> -; RUN: llc -mtriple=armv7s-apple-ios -soft-float -mcpu=arm1136jf-s -o
>>>> - %s | FileCheck %s --check-prefix=CHECK-SOFT
>>>> +; RUN: llc -mtriple=armv7s-apple-ios -mattr=+soft-float
>>>> -mcpu=arm1136jf-s -o - %s | FileCheck %s --check-prefix=CHECK-SOFT
>>>>
>>>> define float @test_call(float %a, float %b) {
>>>> ; CHECK-HARD: vadd.f32 {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
>>>> @@ -8,4 +8,4 @@ define float @test_call(float %a, float
>>>> ; CHECK-SOFT: bl ___addsf3{{$}}
>>>> %sum = fadd float %a, %b
>>>> ret float %sum
>>>> -}
>>>> \ No newline at end of file
>>>> +}
>>>>
>>>> Modified:
>>>> llvm/trunk/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> ---
>>>> llvm/trunk/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
>>>> (original)
>>>> +++
>>>> llvm/trunk/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll Mon
>>>> May 11 20:26:05 2015
>>>> @@ -1,10 +1,14 @@
>>>> -; RUN: llc < %s -soft-float
>>>> +; RUN: llc < %s
>>>> ; PR3899
>>>>
>>>> @m = external global <2 x double>
>>>>
>>>> -define double @vector_ex() nounwind {
>>>> +define double @vector_ex() nounwind #0 {
>>>> %v = load <2 x double>, <2 x double>* @m
>>>> %x = extractelement <2 x double> %v, i32 1
>>>> ret double %x
>>>> }
>>>> +
>>>> +; Soft-float attribute so that targets that pay attention to soft
>>>> float will
>>>> +; make floating point types illegal and we'll exercise the legalizer
>>>> code.
>>>> +attributes #0 = { "use-soft-float" = "true" }
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/X86/cvt16.ll
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cvt16.ll?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/X86/cvt16.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/X86/cvt16.ll Mon May 11 20:26:05 2015
>>>> @@ -1,7 +1,7 @@
>>>> ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu
>>>> -mcpu=corei7 -mattr=-f16c | FileCheck %s -check-prefix=CHECK
>>>> -check-prefix=LIBCALL
>>>> ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu
>>>> -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=CHECK
>>>> -check-prefix=F16C
>>>> -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu
>>>> -mcpu=corei7 -soft-float=1 -mattr=-f16c | FileCheck %s -check-prefix=CHECK
>>>> -check-prefix=SOFTFLOAT
>>>> -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu
>>>> -mcpu=corei7 -soft-float=1 -mattr=+f16c | FileCheck %s -check-prefix=CHECK
>>>> -check-prefix=SOFTFLOAT
>>>> +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu
>>>> -mcpu=corei7 -mattr=-f16c,+soft-float | FileCheck %s -check-prefix=CHECK
>>>> -check-prefix=SOFTFLOAT
>>>> +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu
>>>> -mcpu=corei7 -mattr=+f16c,+soft-float | FileCheck %s -check-prefix=CHECK
>>>> -check-prefix=SOFTFLOAT
>>>>
>>>> ; This is a test for float to half float conversions on x86-64.
>>>> ;
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/X86/floor-soft-float.ll
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/floor-soft-float.ll?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/X86/floor-soft-float.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/X86/floor-soft-float.ll Mon May 11 20:26:05
>>>> 2015
>>>> @@ -1,5 +1,5 @@
>>>> -; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx -soft-float=0 |
>>>> FileCheck %s --check-prefix=CHECK-HARD-FLOAT
>>>> -; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx -soft-float=1 |
>>>> FileCheck %s --check-prefix=CHECK-SOFT-FLOAT
>>>> +; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx | FileCheck %s
>>>> --check-prefix=CHECK-HARD-FLOAT
>>>> +; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx,+soft-float |
>>>> FileCheck %s --check-prefix=CHECK-SOFT-FLOAT
>>>>
>>>> target triple = "x86_64-unknown-linux-gnu"
>>>>
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/X86/soft-fp.ll
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/soft-fp.ll?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/test/CodeGen/X86/soft-fp.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/X86/soft-fp.ll Mon May 11 20:26:05 2015
>>>> @@ -1,5 +1,5 @@
>>>> -; RUN: llc < %s -march=x86 -mattr=+sse2 -soft-float | FileCheck %s
>>>> -; RUN: llc < %s -march=x86-64 -mattr=+sse2 -soft-float | FileCheck %s
>>>> +; RUN: llc < %s -march=x86 -mattr=+sse2,+soft-float | FileCheck %s
>>>> +; RUN: llc < %s -march=x86-64 -mattr=+sse2,+soft-float | FileCheck %s
>>>>
>>>> ; CHECK-NOT: xmm{[0-9]+}
>>>>
>>>>
>>>> Modified: llvm/trunk/tools/llc/llc.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/tools/llc/llc.cpp (original)
>>>> +++ llvm/trunk/tools/llc/llc.cpp Mon May 11 20:26:05 2015
>>>> @@ -281,9 +281,8 @@ static int compileModule(char **argv, LL
>>>> return 0;
>>>>
>>>> assert(M && "Should have exited if we didn't have a module!");
>>>> -
>>>> - if (GenerateSoftFloatCalls)
>>>> - FloatABIForCalls = FloatABI::Soft;
>>>> + if (FloatABIForCalls != FloatABI::Default)
>>>> + Options.FloatABIType = FloatABIForCalls;
>>>>
>>>> // Figure out where we are going to send the output.
>>>> std::unique_ptr<tool_output_file> Out =
>>>>
>>>> Modified: llvm/trunk/tools/lli/lli.cpp
>>>> URL:
>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/lli.cpp?rev=237079&r1=237078&r2=237079&view=diff
>>>>
>>>> ==============================================================================
>>>> --- llvm/trunk/tools/lli/lli.cpp (original)
>>>> +++ llvm/trunk/tools/lli/lli.cpp Mon May 11 20:26:05 2015
>>>> @@ -465,11 +465,8 @@ int main(int argc, char **argv, char * c
>>>> builder.setOptLevel(OLvl);
>>>>
>>>> TargetOptions Options;
>>>> - Options.UseSoftFloat = GenerateSoftFloatCalls;
>>>> if (FloatABIForCalls != FloatABI::Default)
>>>> Options.FloatABIType = FloatABIForCalls;
>>>> - if (GenerateSoftFloatCalls)
>>>> - FloatABIForCalls = FloatABI::Soft;
>>>>
>>>> builder.setTargetOptions(Options);
>>>>
>>>>
>>>>
>>>> _______________________________________________
>>>> llvm-commits mailing list
>>>> llvm-commits at cs.uiuc.edu
>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>>
>>>
>>>
>
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