[PATCH] [mips] [IAS] Slightly improve shift instruction generation in expandLoadImm.

[Toma Tabacu]

For the committed version, I took the liberty to fix another 3 indentation issues.


================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1669-1672
@@ -1661,5 +1668,6 @@
+template <unsigned ShiftAmount>
 void createLShiftOri(int64_t Value, unsigned RegNo, SMLoc IDLoc,
                    SmallVectorImpl<MCInst> &Instructions) {
-  createLShiftOri<PerformShift>(MCOperand::CreateImm(Value), RegNo, IDLoc,
+  createLShiftOri<ShiftAmount>(MCOperand::CreateImm(Value), RegNo, IDLoc,
                                 Instructions);
 }
----------------
Also fixed these 2 indentation mismatches.

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1966-1967
@@ -1949,3 +1965,4 @@
 
-    createLShiftOri<false>(MCOperand::CreateExpr(HigherExpr), RegNo, SMLoc(),
+    createLShiftOri<0>(MCOperand::CreateExpr(HigherExpr), RegNo, SMLoc(),
                          Instructions);
+    createLShiftOri<16>(MCOperand::CreateExpr(HiExpr), RegNo, SMLoc(),
----------------
Also fixed this indentation mismatch.

http://reviews.llvm.org/D8974

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