[PATCH] X86: Do not select X86 custom vector nodes if operand types don't match

[Matthias Braun]

Thanks for the reviews. I decided against pulling out the getVT() == VT checks, as then I would need extra checks to guard against Undef which doesn't make the code nicer IMO.

Changing horizontal add/sub and ADDSUB matching to not be a DAGCombine but a lowering makes perfect sense, I'll try to change the code to that.


REPOSITORY
  rL LLVM

http://reviews.llvm.org/D9120

EMAIL PREFERENCES
  http://reviews.llvm.org/settings/panel/emailpreferences/