[PATCH] Add direct moves to/from VSR and exploit them for FP/INT conversions
Nemanja Ivanovic
nemanja.i.ibm at gmail.com
Fri Apr 10 07:34:57 PDT 2015
REPOSITORY
rL LLVM
================
Comment at: test/CodeGen/PowerPC/fp-int-conversions-direct-moves.ll:13
@@ +12,3 @@
+; CHECK-LABEL: @_Z6testcff
+; CHECK: xscvdpsxws {{[0-9]+}}, 1
+; CHECK: mfvsrwz 3, {{[0-9]+}}
----------------
The regular expression will be changed from {{[0-9]+}} to [[CONV-REG:[0-9]+]] for the first occurrence of the register and to [[CONV-REG]] for the second occurrence. This is to ensure that the destination register for what we convert is the same as the source register for the move instruction.
This applies throughout. If this turns out to be the only comment, no further review will be posted but the change will be made in the committed version.
http://reviews.llvm.org/D8928
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