[PATCH] [X86, AVX] adjust tablegen patterns to generate better code for scalar insertion into zero vector (PR23073)
Sanjay Patel
spatel at rotateright.com
Thu Apr 2 07:13:37 PDT 2015
================
Comment at: test/CodeGen/X86/vector-shuffle-256-v4.ll:846
@@ -845,3 +845,3 @@
; ALL: # BB#0:
-; ALL-NEXT: vxorpd %xmm1, %xmm1, %xmm1
+; ALL: vxorpd %xmm1, %xmm1, %xmm1
; ALL-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
----------------
craig.topper wrote:
> Why is this not ALL-NEXT anymore?
Hi Craig -
We now print a 'kill' ahead of the xor. I didn't see any other tests matching on that in this file, so I loosened the check. But I see that other regression test files do have that kind of check, so I'll add another check line:
_insert_reg_and_zero_v4f64: ## @insert_reg_and_zero_v4f64
## BB#0:
## kill: XMM0<def> XMM0<kill> YMM0<def>
vxorpd %xmm1, %xmm1, %xmm1
vmovsd %xmm0, %xmm1, %xmm0 ## xmm0 = xmm0[0],xmm1[1]
retq
http://reviews.llvm.org/D8794
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