[PATCH] [SLSR] handle candidate form &B[i * S]

Andrew Trick atrick at apple.com
Tue Mar 10 23:29:25 PDT 2015


> On Mar 10, 2015, at 9:09 PM, Jingyue Wu <jingyue at google.com> wrote:
> 
> Adds more comments and makes TTI mandatory
> 
> 
> http://reviews.llvm.org/D7459
> 
> Files:
>  lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
>  test/Transforms/StraightLineStrengthReduce/X86/lit.local.cfg
>  test/Transforms/StraightLineStrengthReduce/X86/no-slsr.ll
>  test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
>  test/Transforms/StraightLineStrengthReduce/slsr-mul.ll
>  test/Transforms/StraightLineStrengthReduce/slsr.ll
> 
> EMAIL PREFERENCES
>  http://reviews.llvm.org/settings/panel/emailpreferences/
> <D7459.21673.patch>

I was wondering about the attached test caseā€¦ can you comment on why your SLSR pass fails to find a basis for %mul3? It seems that your pass needs more than one address to be scaled using a mul or gep before it will optimize anything.

  %mul1 = shl nsw i32 %main_stride, 1
  %add.ptr2 = getelementptr inbounds i8, i8* %main, i32 %mul1
  %4 = bitcast i8* %add.ptr2 to <1 x i64>*
  %5 = load <1 x i64>, <1 x i64>* %4, align 8, !tbaa !4
  %mul3 = mul nsw i32 %main_stride, 3
  %add.ptr4 = getelementptr inbounds i8, i8* %main, i32 %mul3
  %6 = bitcast i8* %add.ptr4 to <1 x i64>*
  %7 = load <1 x i64>, <1 x i64>* %6, align 8, !tbaa !4

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