[PATCHES] R600/SI: New V_FRACT fix, intrinsic for S_FLBIT_I32, and more

[Marek Olšák]

On Tue, Mar 10, 2015 at 3:45 PM, Tom Stellard <tom at stellard.net> wrote:
> On Thu, Mar 05, 2015 at 10:33:15PM +0100, Marek Olšák wrote:
>> From 76f3f6561ec37deff8b74bfd9d70c9ad5d175774 Mon Sep 17 00:00:00 2001
>> From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak at amd.com>
>> Date: Thu, 5 Mar 2015 19:39:30 +0100
>> Subject: [PATCH 1/3] R600/SI: Handle FSUB and FADD in SelectVOP3Mods
>>
>> Fract tests need this for proper folding of modifiers.
>> ---
>>  lib/Target/R600/AMDGPUISelDAGToDAG.cpp | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/lib/Target/R600/AMDGPUISelDAGToDAG.cpp b/lib/Target/R600/AMDGPUISelDAGToDAG.cpp
>> index 77fce38..ef440ad 100644
>> --- a/lib/Target/R600/AMDGPUISelDAGToDAG.cpp
>> +++ b/lib/Target/R600/AMDGPUISelDAGToDAG.cpp
>> @@ -1157,9 +1157,20 @@ bool AMDGPUDAGToDAGISel::SelectVOP3Mods(SDValue In, SDValue &Src,
>>
>>    Src = In;
>>
>> +  // This is silly, but it occurs after the fract-to-floor expansion.
>> +  if (Src.getOpcode() == ISD::FADD &&
>> +      isa<ConstantFPSDNode>(Src.getOperand(1)) &&
>> +      cast<ConstantFPSDNode>(Src.getOperand(1))->isZero())
>> +    Src = Src.getOperand(0);
>> +
>
> This isn't being folded by the DAGCombiner because UnsafeFPMath is
> disabled. I don't think we should be attempting to fold this here.
>
>
>>    if (Src.getOpcode() == ISD::FNEG) {
>>      Mods |= SISrcMods::NEG;
>>      Src = Src.getOperand(0);
>> +  } else if (Src.getOpcode() == ISD::FSUB &&
>> +             isa<ConstantFPSDNode>(Src.getOperand(0)) &&
>> +             cast<ConstantFPSDNode>(Src.getOperand(0))->isZero()) {
>> +    Mods |= SISrcMods::NEG;
>> +    Src = Src.getOperand(1);
>
> Same comment for this too.

Then I'm afraid the negate modifiers are never folded with
UnsafeFPMath, because LLVMBuildFNeg is implemented as (fsub 0 x),
which is always expanded to (fadd 0 (fneg x)) for f64.

Maybe LLVM IR should have native fneg to avoid this nonsense.

Marek