[llvm] r227316 - R600: Move DataLayout to AMDGPUTargetMachine
Eric Christopher
echristo at gmail.com
Wed Jan 28 14:49:34 PST 2015
Thanks Tom!
-eric
On Wed Jan 28 2015 at 8:08:33 AM Tom Stellard <thomas.stellard at amd.com>
wrote:
> Author: tstellar
> Date: Wed Jan 28 10:04:26 2015
> New Revision: 227316
>
> URL: http://llvm.org/viewvc/llvm-project?rev=227316&view=rev
> Log:
> R600: Move DataLayout to AMDGPUTargetMachine
>
> This is a follow up to r227113.
>
> It is now required to use the amdgcn target for SI and newer GPUs.
>
> Modified:
> llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp
> llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h
> llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp
> llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h
> llvm/trunk/test/CodeGen/R600/fmax_legacy.f64.ll
> llvm/trunk/test/CodeGen/R600/fmin_legacy.f64.ll
> llvm/trunk/test/CodeGen/R600/fp-classify.ll
> llvm/trunk/test/CodeGen/R600/global-extload-i1.ll
> llvm/trunk/test/CodeGen/R600/global-extload-i16.ll
> llvm/trunk/test/CodeGen/R600/global-extload-i32.ll
> llvm/trunk/test/CodeGen/R600/global-extload-i8.ll
> llvm/trunk/test/CodeGen/R600/hsa.ll
> llvm/trunk/test/CodeGen/R600/inline-asm.ll
> llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll
> llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll
> llvm/trunk/test/CodeGen/R600/no-shrink-extloads.ll
> llvm/trunk/test/CodeGen/R600/sdivrem64.ll
> llvm/trunk/test/CodeGen/R600/store-barrier.ll
> llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll
>
> Modified: llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> R600/AMDGPUSubtarget.cpp?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp (original)
> +++ llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp Wed Jan 28 10:04:26
> 2015
> @@ -59,20 +59,6 @@ AMDGPUSubtarget::initializeSubtargetDepe
> return *this;
> }
>
> -static std::string computeDataLayout(const AMDGPUSubtarget &ST) {
> - std::string Ret = "e-p:32:32";
> -
> - if (ST.is64bit()) {
> - // 32-bit private, local, and region pointers. 64-bit global and
> constant.
> - Ret += "-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64";
> - }
> -
> - Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256"
> - "-v512:512-v1024:1024-v2048:2048-n32:64";
> -
> - return Ret;
> -}
> -
> AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef
> FS,
> TargetMachine &TM)
> : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false),
> @@ -83,12 +69,14 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringR
> EnablePromoteAlloca(false), EnableIfCvt(true),
> EnableLoadStoreOpt(false), WavefrontSize(0), CFALUBug(false),
> LocalMemorySize(0),
> EnableVGPRSpilling(false),
> - DL(computeDataLayout(initializeSubtargetDependencies(TT, GPU,
> FS))),
> FrameLowering(TargetFrameLowering::StackGrowsUp,
> 64 * 16, // Maximum stack alignment (long16)
> 0),
> InstrItins(getInstrItineraryForCPU(GPU)),
> TargetTriple(TT) {
> +
> + initializeSubtargetDependencies(TT, GPU, FS);
> +
> if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
> InstrInfo.reset(new R600InstrInfo(*this));
> TLInfo.reset(new R600TargetLowering(TM));
>
> Modified: llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> R600/AMDGPUSubtarget.h?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h (original)
> +++ llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h Wed Jan 28 10:04:26 2015
> @@ -22,7 +22,6 @@
> #include "R600ISelLowering.h"
> #include "llvm/ADT/StringExtras.h"
> #include "llvm/ADT/StringRef.h"
> -#include "llvm/IR/DataLayout.h"
> #include "llvm/Target/TargetSubtargetInfo.h"
>
> #define GET_SUBTARGETINFO_HEADER
> @@ -67,7 +66,6 @@ private:
> int LocalMemorySize;
> bool EnableVGPRSpilling;
>
> - DataLayout DL;
> AMDGPUFrameLowering FrameLowering;
> std::unique_ptr<AMDGPUTargetLowering> TLInfo;
> std::unique_ptr<AMDGPUInstrInfo> InstrInfo;
> @@ -79,10 +77,6 @@ public:
> AMDGPUSubtarget &initializeSubtargetDependencies(StringRef TT,
> StringRef GPU,
> StringRef FS);
>
> - // FIXME: This routine needs to go away. See comments in
> - // AMDGPUTargetMachine.h.
> - const DataLayout *getDataLayout() const { return &DL; }
> -
> const AMDGPUFrameLowering *getFrameLowering() const override {
> return &FrameLowering;
> }
>
> Modified: llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> R600/AMDGPUTargetMachine.cpp?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp (original)
> +++ llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp Wed Jan 28
> 10:04:26 2015
> @@ -50,12 +50,28 @@ static MachineSchedRegistry
> SchedCustomRegistry("r600", "Run R600's custom scheduler",
> createR600MachineScheduler);
>
> +static std::string computeDataLayout(StringRef TT) {
> + Triple Triple(TT);
> + std::string Ret = "e-p:32:32";
> +
> + if (Triple.getArch() == Triple::amdgcn) {
> + // 32-bit private, local, and region pointers. 64-bit global and
> constant.
> + Ret += "-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64";
> + }
> +
> + Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256"
> + "-v512:512-v1024:1024-v2048:2048-n32:64";
> +
> + return Ret;
> +}
> +
> AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT,
> StringRef CPU, StringRef FS,
> TargetOptions Options,
> Reloc::Model RM,
> CodeModel::Model CM,
> CodeGenOpt::Level OptLevel)
> : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel),
> + DL(computeDataLayout(TT)),
> TLOF(new TargetLoweringObjectFileELF()),
> Subtarget(TT, CPU, FS, *this), IntrinsicInfo() {
> setRequiresStructuredCFG(true);
>
> Modified: llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> R600/AMDGPUTargetMachine.h?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h (original)
> +++ llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h Wed Jan 28 10:04:26
> 2015
> @@ -29,6 +29,9 @@ namespace llvm {
> //===-------------------------------------------------------
> ---------------===//
>
> class AMDGPUTargetMachine : public LLVMTargetMachine {
> +private:
> + const DataLayout DL;
> +
> protected:
> TargetLoweringObjectFile *TLOF;
> AMDGPUSubtarget Subtarget;
> @@ -42,7 +45,7 @@ public:
> // FIXME: This is currently broken, the DataLayout needs to move to
> // the target machine.
> const DataLayout *getDataLayout() const override {
> - return getSubtargetImpl()->getDataLayout();
> + return &DL;
> }
> const AMDGPUSubtarget *getSubtargetImpl() const override {
> return &Subtarget;
>
> Modified: llvm/trunk/test/CodeGen/R600/fmax_legacy.f64.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/fmax_legacy.f64.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/fmax_legacy.f64.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/fmax_legacy.f64.ll Wed Jan 28 10:04:26
> 2015
> @@ -1,4 +1,4 @@
> -; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI
> -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI
> -check-prefix=FUNC %s
> ; Make sure we don't try to form FMAX_LEGACY nodes with f64
>
> declare i32 @llvm.r600.read.tidig.x() #1
>
> Modified: llvm/trunk/test/CodeGen/R600/fmin_legacy.f64.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/fmin_legacy.f64.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/fmin_legacy.f64.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/fmin_legacy.f64.ll Wed Jan 28 10:04:26
> 2015
> @@ -1,4 +1,4 @@
> -; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI
> -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI
> -check-prefix=FUNC %s
>
> declare i32 @llvm.r600.read.tidig.x() #1
>
>
> Modified: llvm/trunk/test/CodeGen/R600/fp-classify.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/fp-classify.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/fp-classify.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/fp-classify.ll Wed Jan 28 10:04:26 2015
> @@ -1,5 +1,5 @@
> -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI %s
> -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI %s
> +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI %s
> +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s |
> FileCheck -check-prefix=SI %s
>
> declare i1 @llvm.AMDGPU.class.f32(float, i32) #1
> declare i1 @llvm.AMDGPU.class.f64(double, i32) #1
>
> Modified: llvm/trunk/test/CodeGen/R600/global-extload-i1.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/global-extload-i1.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/global-extload-i1.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/global-extload-i1.ll Wed Jan 28 10:04:26
> 2015
> @@ -1,5 +1,5 @@
> -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s |
> FileCheck -check-prefix=SI -check-prefix=FUNC %s
> ; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG
> -check-prefix=FUNC %s
> ; FIXME: Evergreen broken
>
>
> Modified: llvm/trunk/test/CodeGen/R600/global-extload-i16.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/global-extload-i16.ll?rev=227316&r1=227315&
> r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/global-extload-i16.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/global-extload-i16.ll Wed Jan 28
> 10:04:26 2015
> @@ -1,5 +1,5 @@
> -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s |
> FileCheck -check-prefix=SI -check-prefix=FUNC %s
> ; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG
> -check-prefix=FUNC %s
> ; FIXME: cypress is broken because the bigger testcases spill and it's
> not implemented
>
>
> Modified: llvm/trunk/test/CodeGen/R600/global-extload-i32.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/global-extload-i32.ll?rev=227316&r1=227315&
> r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/global-extload-i32.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/global-extload-i32.ll Wed Jan 28
> 10:04:26 2015
> @@ -1,5 +1,5 @@
> -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s |
> FileCheck -check-prefix=SI -check-prefix=FUNC %s
> ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG
> -check-prefix=FUNC %s
>
> ; FUNC-LABEL: {{^}}zextload_global_i32_to_i64:
>
> Modified: llvm/trunk/test/CodeGen/R600/global-extload-i8.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/global-extload-i8.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/global-extload-i8.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/global-extload-i8.ll Wed Jan 28 10:04:26
> 2015
> @@ -1,5 +1,5 @@
> -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s |
> FileCheck -check-prefix=SI -check-prefix=FUNC %s
> ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG
> -check-prefix=FUNC %s
>
> ; FUNC-LABEL: {{^}}zextload_global_i8_to_i32:
>
> Modified: llvm/trunk/test/CodeGen/R600/hsa.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/hsa.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/hsa.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/hsa.ll Wed Jan 28 10:04:26 2015
> @@ -1,4 +1,4 @@
> -; RUN: llc < %s -mtriple=r600--amdhsa -mcpu=kaveri | FileCheck
> --check-prefix=HSA %s
> +; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck
> --check-prefix=HSA %s
>
> ; HSA: {{^}}simple:
> ; HSA: .section .hsa.version
>
> Modified: llvm/trunk/test/CodeGen/R600/inline-asm.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/inline-asm.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/inline-asm.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/inline-asm.ll Wed Jan 28 10:04:26 2015
> @@ -1,5 +1,5 @@
> -; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s
> -; RUN: llc < %s -march=r600 -mcpu=tonga -verify-machineinstrs | FileCheck
> %s
> +; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck
> %s
> +; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs |
> FileCheck %s
>
> ; CHECK: {{^}}inline_asm:
> ; CHECK: s_endpgm
>
> Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/llvm.AMDGPU.class.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll Wed Jan 28 10:04:26
> 2015
> @@ -1,4 +1,4 @@
> -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI %s
> +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI %s
>
> declare i1 @llvm.AMDGPU.class.f32(float, i32) #1
> declare i1 @llvm.AMDGPU.class.f64(double, i32) #1
>
> Modified: llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/llvm.sqrt.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll Wed Jan 28 10:04:26 2015
> @@ -1,6 +1,6 @@
> ; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s
> --check-prefix=R600-CHECK
> -; RUN: llc < %s -march=r600 --mcpu=SI -verify-machineinstrs| FileCheck %s
> --check-prefix=SI-CHECK
> -; RUN: llc < %s -march=r600 --mcpu=tonga -verify-machineinstrs| FileCheck
> %s --check-prefix=SI-CHECK
> +; RUN: llc < %s -march=amdgcn --mcpu=SI -verify-machineinstrs| FileCheck
> %s --check-prefix=SI-CHECK
> +; RUN: llc < %s -march=amdgcn --mcpu=tonga -verify-machineinstrs|
> FileCheck %s --check-prefix=SI-CHECK
>
> ; R600-CHECK-LABEL: {{^}}sqrt_f32:
> ; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z
>
> Modified: llvm/trunk/test/CodeGen/R600/no-shrink-extloads.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/no-shrink-extloads.ll?rev=227316&r1=
> 227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/no-shrink-extloads.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/no-shrink-extloads.ll Wed Jan 28
> 10:04:26 2015
> @@ -1,4 +1,4 @@
> -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
>
> declare i32 @llvm.r600.read.tidig.x() nounwind readnone
>
>
> Modified: llvm/trunk/test/CodeGen/R600/sdivrem64.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/sdivrem64.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/sdivrem64.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/sdivrem64.ll Wed Jan 28 10:04:26 2015
> @@ -1,4 +1,4 @@
> -;RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck
> --check-prefix=SI --check-prefix=FUNC %s
> +;RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck
> --check-prefix=SI --check-prefix=FUNC %s
> ;RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG
> --check-prefix=FUNC %s
>
> ;FUNC-LABEL: {{^}}test_sdiv:
>
> Modified: llvm/trunk/test/CodeGen/R600/store-barrier.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/store-barrier.ll?rev=227316&r1=227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/store-barrier.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/store-barrier.ll Wed Jan 28 10:04:26 2015
> @@ -1,5 +1,5 @@
> -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs
> -mattr=+load-store-opt -enable-misched < %s | FileCheck
> --check-prefix=CHECK %s
> -; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs
> -mattr=+load-store-opt -enable-misched < %s | FileCheck
> --check-prefix=CHECK %s
> +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs
> -mattr=+load-store-opt -enable-misched < %s | FileCheck
> --check-prefix=CHECK %s
> +; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs
> -mattr=+load-store-opt -enable-misched < %s | FileCheck
> --check-prefix=CHECK %s
>
> ; This test is for a bug in the machine scheduler where stores without
> ; an underlying object would be moved across the barrier. In this
>
> Modified: llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/
> CodeGen/R600/trunc-cmp-constant.ll?rev=227316&r1=
> 227315&r2=227316&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll (original)
> +++ llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll Wed Jan 28
> 10:04:26 2015
> @@ -1,5 +1,5 @@
> -; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> -; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck
> -check-prefix=SI -check-prefix=FUNC %s
> +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s |
> FileCheck -check-prefix=SI -check-prefix=FUNC %s
>
> ; FUNC-LABEL {{^}}sextload_i1_to_i32_trunc_cmp_eq_0:
> ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
>
>
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