<div dir="ltr">Thanks Tom!<br><br>-eric</div><br><div class="gmail_quote">On Wed Jan 28 2015 at 8:08:33 AM Tom Stellard <<a href="mailto:thomas.stellard@amd.com">thomas.stellard@amd.com</a>> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: tstellar<br>
Date: Wed Jan 28 10:04:26 2015<br>
New Revision: 227316<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=227316&view=rev" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project?rev=227316&view=rev</a><br>
Log:<br>
R600: Move DataLayout to AMDGPUTargetMachine<br>
<br>
This is a follow up to r227113.<br>
<br>
It is now required to use the amdgcn target for SI and newer GPUs.<br>
<br>
Modified:<br>
    llvm/trunk/lib/Target/R600/<u></u>AMDGPUSubtarget.cpp<br>
    llvm/trunk/lib/Target/R600/<u></u>AMDGPUSubtarget.h<br>
    llvm/trunk/lib/Target/R600/<u></u>AMDGPUTargetMachine.cpp<br>
    llvm/trunk/lib/Target/R600/<u></u>AMDGPUTargetMachine.h<br>
    llvm/trunk/test/CodeGen/R600/<u></u>fmax_legacy.f64.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>fmin_legacy.f64.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>fp-classify.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i1.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i16.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i32.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i8.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>hsa.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>inline-asm.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>llvm.AMDGPU.class.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>llvm.sqrt.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>no-shrink-extloads.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>sdivrem64.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>store-barrier.ll<br>
    llvm/trunk/test/CodeGen/R600/<u></u>trunc-cmp-constant.ll<br>
<br>
Modified: llvm/trunk/lib/Target/R600/<u></u>AMDGPUSubtarget.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/lib/Target/<u></u>R600/AMDGPUSubtarget.cpp?rev=<u></u>227316&r1=227315&r2=227316&<u></u>view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/lib/Target/R600/<u></u>AMDGPUSubtarget.cpp (original)<br>
+++ llvm/trunk/lib/Target/R600/<u></u>AMDGPUSubtarget.cpp Wed Jan 28 10:04:26 2015<br>
@@ -59,20 +59,6 @@ AMDGPUSubtarget::<u></u>initializeSubtargetDepe<br>
   return *this;<br>
 }<br>
<br>
-static std::string computeDataLayout(const AMDGPUSubtarget &ST) {<br>
-  std::string Ret = "e-p:32:32";<br>
-<br>
-  if (ST.is64bit()) {<br>
-    // 32-bit private, local, and region pointers. 64-bit global and constant.<br>
-    Ret += "-p1:64:64-p2:64:64-p3:32:32-<u></u>p4:64:64-p5:32:32-p24:64:64";<br>
-  }<br>
-<br>
-  Ret += "-i64:64-v16:16-v24:32-v32:32-<u></u>v48:64-v96:128-v192:256-v256:<u></u>256"<br>
-         "-v512:512-v1024:1024-v2048:<u></u>2048-n32:64";<br>
-<br>
-  return Ret;<br>
-}<br>
-<br>
 AMDGPUSubtarget::<u></u>AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS,<br>
                                  TargetMachine &TM)<br>
     : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false),<br>
@@ -83,12 +69,14 @@ AMDGPUSubtarget::<u></u>AMDGPUSubtarget(StringR<br>
       EnablePromoteAlloca(false), EnableIfCvt(true),<br>
       EnableLoadStoreOpt(false), WavefrontSize(0), CFALUBug(false), LocalMemorySize(0),<br>
       EnableVGPRSpilling(false),<br>
-      DL(computeDataLayout(<u></u>initializeSubtargetDependencie<u></u>s(TT, GPU, FS))),<br>
       FrameLowering(<u></u>TargetFrameLowering::<u></u>StackGrowsUp,<br>
                     64 * 16, // Maximum stack alignment (long16)<br>
                     0),<br>
       InstrItins(<u></u>getInstrItineraryForCPU(GPU)),<br>
       TargetTriple(TT) {<br>
+<br>
+  initializeSubtargetDependencie<u></u>s(TT, GPU, FS);<br>
+<br>
   if (getGeneration() <= AMDGPUSubtarget::NORTHERN_<u></u>ISLANDS) {<br>
     InstrInfo.reset(new R600InstrInfo(*this));<br>
     TLInfo.reset(new R600TargetLowering(TM));<br>
<br>
Modified: llvm/trunk/lib/Target/R600/<u></u>AMDGPUSubtarget.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/lib/Target/<u></u>R600/AMDGPUSubtarget.h?rev=<u></u>227316&r1=227315&r2=227316&<u></u>view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/lib/Target/R600/<u></u>AMDGPUSubtarget.h (original)<br>
+++ llvm/trunk/lib/Target/R600/<u></u>AMDGPUSubtarget.h Wed Jan 28 10:04:26 2015<br>
@@ -22,7 +22,6 @@<br>
 #include "R600ISelLowering.h"<br>
 #include "llvm/ADT/StringExtras.h"<br>
 #include "llvm/ADT/StringRef.h"<br>
-#include "llvm/IR/DataLayout.h"<br>
 #include "llvm/Target/<u></u>TargetSubtargetInfo.h"<br>
<br>
 #define GET_SUBTARGETINFO_HEADER<br>
@@ -67,7 +66,6 @@ private:<br>
   int LocalMemorySize;<br>
   bool EnableVGPRSpilling;<br>
<br>
-  DataLayout DL;<br>
   AMDGPUFrameLowering FrameLowering;<br>
   std::unique_ptr<<u></u>AMDGPUTargetLowering> TLInfo;<br>
   std::unique_ptr<<u></u>AMDGPUInstrInfo> InstrInfo;<br>
@@ -79,10 +77,6 @@ public:<br>
   AMDGPUSubtarget &<u></u>initializeSubtargetDependencie<u></u>s(StringRef TT, StringRef GPU,<br>
                                                    StringRef FS);<br>
<br>
-  // FIXME: This routine needs to go away. See comments in<br>
-  // AMDGPUTargetMachine.h.<br>
-  const DataLayout *getDataLayout() const { return &DL; }<br>
-<br>
   const AMDGPUFrameLowering *getFrameLowering() const override {<br>
     return &FrameLowering;<br>
   }<br>
<br>
Modified: llvm/trunk/lib/Target/R600/<u></u>AMDGPUTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/lib/Target/<u></u>R600/AMDGPUTargetMachine.cpp?<u></u>rev=227316&r1=227315&r2=<u></u>227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/lib/Target/R600/<u></u>AMDGPUTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/R600/<u></u>AMDGPUTargetMachine.cpp Wed Jan 28 10:04:26 2015<br>
@@ -50,12 +50,28 @@ static MachineSchedRegistry<br>
 SchedCustomRegistry("r600", "Run R600's custom scheduler",<br>
                     createR600MachineScheduler);<br>
<br>
+static std::string computeDataLayout(StringRef TT) {<br>
+  Triple Triple(TT);<br>
+  std::string Ret = "e-p:32:32";<br>
+<br>
+  if (Triple.getArch() == Triple::amdgcn) {<br>
+    // 32-bit private, local, and region pointers. 64-bit global and constant.<br>
+    Ret += "-p1:64:64-p2:64:64-p3:32:32-<u></u>p4:64:64-p5:32:32-p24:64:64";<br>
+  }<br>
+<br>
+  Ret += "-i64:64-v16:16-v24:32-v32:32-<u></u>v48:64-v96:128-v192:256-v256:<u></u>256"<br>
+         "-v512:512-v1024:1024-v2048:<u></u>2048-n32:64";<br>
+<br>
+  return Ret;<br>
+}<br>
+<br>
 AMDGPUTargetMachine::<u></u>AMDGPUTargetMachine(const Target &T, StringRef TT,<br>
                                          StringRef CPU, StringRef FS,<br>
                                          TargetOptions Options, Reloc::Model RM,<br>
                                          CodeModel::Model CM,<br>
                                          CodeGenOpt::Level OptLevel)<br>
     : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel),<br>
+      DL(computeDataLayout(TT)),<br>
       TLOF(new TargetLoweringObjectFileELF())<u></u>,<br>
       Subtarget(TT, CPU, FS, *this), IntrinsicInfo() {<br>
   setRequiresStructuredCFG(true)<u></u>;<br>
<br>
Modified: llvm/trunk/lib/Target/R600/<u></u>AMDGPUTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/lib/Target/<u></u>R600/AMDGPUTargetMachine.h?<u></u>rev=227316&r1=227315&r2=<u></u>227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/lib/Target/R600/<u></u>AMDGPUTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/R600/<u></u>AMDGPUTargetMachine.h Wed Jan 28 10:04:26 2015<br>
@@ -29,6 +29,9 @@ namespace llvm {<br>
 //===-------------------------<u></u>------------------------------<u></u>---------------===//<br>
<br>
 class AMDGPUTargetMachine : public LLVMTargetMachine {<br>
+private:<br>
+  const DataLayout DL;<br>
+<br>
 protected:<br>
   TargetLoweringObjectFile *TLOF;<br>
   AMDGPUSubtarget Subtarget;<br>
@@ -42,7 +45,7 @@ public:<br>
   // FIXME: This is currently broken, the DataLayout needs to move to<br>
   // the target machine.<br>
   const DataLayout *getDataLayout() const override {<br>
-    return getSubtargetImpl()-><u></u>getDataLayout();<br>
+    return &DL;<br>
   }<br>
   const AMDGPUSubtarget *getSubtargetImpl() const override {<br>
     return &Subtarget;<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>fmax_legacy.f64.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmax_legacy.f64.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/fmax_legacy.f64.<u></u>ll?rev=227316&r1=227315&r2=<u></u>227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>fmax_legacy.f64.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>fmax_legacy.f64.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
 ; Make sure we don't try to form FMAX_LEGACY nodes with f64<br>
<br>
 declare i32 @llvm.r600.read.tidig.x() #1<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>fmin_legacy.f64.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmin_legacy.f64.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/fmin_legacy.f64.<u></u>ll?rev=227316&r1=227315&r2=<u></u>227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>fmin_legacy.f64.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>fmin_legacy.f64.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
<br>
 declare i32 @llvm.r600.read.tidig.x() #1<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>fp-classify.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fp-classify.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/fp-classify.ll?<u></u>rev=227316&r1=227315&r2=<u></u>227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>fp-classify.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>fp-classify.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,5 +1,5 @@<br>
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s<br>
-; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s<br>
<br>
 declare i1 @llvm.AMDGPU.class.f32(float, i32) #1<br>
 declare i1 @llvm.AMDGPU.class.f64(double, i32) #1<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i1.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-extload-i1.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/global-extload-<u></u>i1.ll?rev=227316&r1=227315&r2=<u></u>227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i1.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i1.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,5 +1,5 @@<br>
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
-; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
 ; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
 ; FIXME: Evergreen broken<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i16.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-extload-i16.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/global-extload-<u></u>i16.ll?rev=227316&r1=227315&<u></u>r2=227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i16.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i16.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,5 +1,5 @@<br>
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
-; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
 ; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
 ; FIXME: cypress is broken because the bigger testcases spill and it's not implemented<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i32.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-extload-i32.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/global-extload-<u></u>i32.ll?rev=227316&r1=227315&<u></u>r2=227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i32.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i32.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,5 +1,5 @@<br>
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
-; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
 ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
<br>
 ; FUNC-LABEL: {{^}}zextload_global_i32_to_<u></u>i64:<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i8.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-extload-i8.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/global-extload-<u></u>i8.ll?rev=227316&r1=227315&r2=<u></u>227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i8.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>global-extload-i8.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,5 +1,5 @@<br>
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
-; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
 ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s<br>
<br>
 ; FUNC-LABEL: {{^}}zextload_global_i8_to_<u></u>i32:<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>hsa.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/hsa.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/hsa.ll?rev=<u></u>227316&r1=227315&r2=227316&<u></u>view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>hsa.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>hsa.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc < %s -mtriple=r600--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s<br>
+; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s<br>
<br>
 ; HSA: {{^}}simple:<br>
 ; HSA: .section        .hsa.version<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>inline-asm.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/inline-asm.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/inline-asm.ll?<u></u>rev=227316&r1=227315&r2=<u></u>227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>inline-asm.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>inline-asm.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,5 +1,5 @@<br>
-; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s<br>
-; RUN: llc < %s -march=r600 -mcpu=tonga -verify-machineinstrs | FileCheck %s<br>
+; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s<br>
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s<br>
<br>
 ; CHECK: {{^}}inline_asm:<br>
 ; CHECK: s_endpgm<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>llvm.AMDGPU.class.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/llvm.AMDGPU.<u></u>class.ll?rev=227316&r1=227315&<u></u>r2=227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>llvm.AMDGPU.class.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>llvm.AMDGPU.class.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s<br>
<br>
 declare i1 @llvm.AMDGPU.class.f32(float, i32) #1<br>
 declare i1 @llvm.AMDGPU.class.f64(double, i32) #1<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>llvm.sqrt.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/llvm.sqrt.ll?rev=<u></u>227316&r1=227315&r2=227316&<u></u>view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>llvm.sqrt.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>llvm.sqrt.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,6 +1,6 @@<br>
 ; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK<br>
-; RUN: llc < %s -march=r600 --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK<br>
-; RUN: llc < %s -march=r600 --mcpu=tonga -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK<br>
+; RUN: llc < %s -march=amdgcn --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK<br>
+; RUN: llc < %s -march=amdgcn --mcpu=tonga -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK<br>
<br>
 ; R600-CHECK-LABEL: {{^}}sqrt_f32:<br>
 ; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>no-shrink-extloads.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/no-shrink-extloads.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/no-shrink-<u></u>extloads.ll?rev=227316&r1=<u></u>227315&r2=227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>no-shrink-extloads.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>no-shrink-extloads.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
<br>
 declare i32 @llvm.r600.read.tidig.x() nounwind readnone<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>sdivrem64.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sdivrem64.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/sdivrem64.ll?rev=<u></u>227316&r1=227315&r2=227316&<u></u>view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>sdivrem64.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>sdivrem64.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,4 +1,4 @@<br>
-;RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s<br>
+;RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s<br>
 ;RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG --check-prefix=FUNC %s<br>
<br>
 ;FUNC-LABEL: {{^}}test_sdiv:<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>store-barrier.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/store-barrier.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/store-barrier.ll?<u></u>rev=227316&r1=227315&r2=<u></u>227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>store-barrier.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>store-barrier.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,5 +1,5 @@<br>
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck  --check-prefix=CHECK %s<br>
-; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck  --check-prefix=CHECK %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck  --check-prefix=CHECK %s<br>
+; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck  --check-prefix=CHECK %s<br>
<br>
 ; This test is for a bug in the machine scheduler where stores without<br>
 ; an underlying object would be moved across the barrier.  In this<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/<u></u>trunc-cmp-constant.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll?rev=227316&r1=227315&r2=227316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/R600/trunc-cmp-<u></u>constant.ll?rev=227316&r1=<u></u>227315&r2=227316&view=diff</a><br>
==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/R600/<u></u>trunc-cmp-constant.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/<u></u>trunc-cmp-constant.ll Wed Jan 28 10:04:26 2015<br>
@@ -1,5 +1,5 @@<br>
-; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
-; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s<br>
<br>
 ; FUNC-LABEL {{^}}sextload_i1_to_i32_trunc_<u></u>cmp_eq_0:<br>
 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]<br>
<br>
<br>
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</blockquote></div>