[PATCH] [ARM] Fix issue with SMLAL (Signed Multiply Accumulate Long) lowering

[Tim Northover]

This doesn't look like the right fix: just because AddcOp0 is *some* SMUL_LOHI doesn't mean AddcOp1 isn't the right one. This patch just perturbs which one we investigate slightly and works in this case but will probably make an equal number worse.


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Comment at: ../llvm/test/CodeGen/ARM/longMAC.ll:81
@@ +80,3 @@
+;CHECK-LABEL: MACLongTest6:
+;CHECK: smlal
+  %conv = sext i32 %a to i64
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We should probably test the actual dataflow here, rather than just the existence of an smlal instruction.

http://reviews.llvm.org/D6998

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